xref: /linux/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - allwinner,sun50i-h616-mali
21              - amlogic,meson-g12a-mali
22              - mediatek,mt8183-mali
23              - mediatek,mt8183b-mali
24              - mediatek,mt8186-mali
25              - mediatek,mt8365-mali
26              - realtek,rtd1619-mali
27              - renesas,r9a07g044-mali
28              - renesas,r9a07g054-mali
29              - renesas,r9a09g047-mali
30              - renesas,r9a09g056-mali
31              - renesas,r9a09g057-mali
32              - rockchip,px30-mali
33              - rockchip,rk3562-mali
34              - rockchip,rk3568-mali
35              - rockchip,rk3576-mali
36          - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
37      - items:
38          - enum:
39              - mediatek,mt8195-mali
40          - const: mediatek,mt8192-mali
41          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
42      - items:
43          - enum:
44              - allwinner,sun55i-a523-mali
45              - mediatek,mt8188-mali
46              - mediatek,mt8192-mali
47              - mediatek,mt8370-mali
48          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
49
50  reg:
51    maxItems: 1
52
53  interrupts:
54    minItems: 3
55    items:
56      - description: Job interrupt
57      - description: MMU interrupt
58      - description: GPU interrupt
59      - description: Event interrupt
60
61  interrupt-names:
62    minItems: 3
63    items:
64      - const: job
65      - const: mmu
66      - const: gpu
67      - const: event
68
69  clocks:
70    minItems: 1
71    maxItems: 3
72
73  clock-names: true
74
75  mali-supply: true
76
77  sram-supply: true
78
79  operating-points-v2: true
80
81  power-domains:
82    minItems: 1
83    maxItems: 5
84
85  power-domain-names:
86    minItems: 2
87    maxItems: 5
88
89  resets:
90    minItems: 1
91    maxItems: 3
92
93  reset-names: true
94
95  "#cooling-cells":
96    const: 2
97
98  dynamic-power-coefficient:
99    $ref: /schemas/types.yaml#/definitions/uint32
100    description:
101      A u32 value that represents the running time dynamic
102      power coefficient in units of uW/MHz/V^2. The
103      coefficient can either be calculated from power
104      measurements or derived by analysis.
105
106      The dynamic power consumption of the GPU is
107      proportional to the square of the Voltage (V) and
108      the clock frequency (f). The coefficient is used to
109      calculate the dynamic power as below -
110
111      Pdyn = dynamic-power-coefficient * V^2 * f
112
113      where voltage is in V, frequency is in MHz.
114
115  dma-coherent: true
116
117  nvmem-cell-names:
118    items:
119      - const: speed-bin
120
121  nvmem-cells:
122    maxItems: 1
123
124required:
125  - compatible
126  - reg
127  - interrupts
128  - interrupt-names
129  - clocks
130
131additionalProperties: false
132
133allOf:
134  - if:
135      properties:
136        compatible:
137          contains:
138            const: amlogic,meson-g12a-mali
139    then:
140      properties:
141        power-domains:
142          maxItems: 1
143        power-domain-names: false
144      required:
145        - resets
146  - if:
147      properties:
148        compatible:
149          contains:
150            enum:
151              - renesas,r9a07g044-mali
152              - renesas,r9a07g054-mali
153              - renesas,r9a09g047-mali
154              - renesas,r9a09g056-mali
155              - renesas,r9a09g057-mali
156    then:
157      properties:
158        interrupts:
159          minItems: 4
160        interrupt-names:
161          minItems: 4
162        clocks:
163          minItems: 3
164        clock-names:
165          items:
166            - const: gpu
167            - const: bus
168            - const: bus_ace
169        power-domains:
170          maxItems: 1
171        power-domain-names: false
172        resets:
173          minItems: 3
174        reset-names:
175          items:
176            - const: rst
177            - const: axi_rst
178            - const: ace_rst
179      required:
180        - clock-names
181        - power-domains
182        - resets
183        - reset-names
184  - if:
185      properties:
186        compatible:
187          contains:
188            const: mediatek,mt8183-mali
189    then:
190      properties:
191        power-domains:
192          minItems: 3
193          maxItems: 3
194        power-domain-names:
195          items:
196            - const: core0
197            - const: core1
198            - const: core2
199
200      required:
201        - sram-supply
202        - power-domains
203        - power-domain-names
204    else:
205      properties:
206        sram-supply: false
207  - if:
208      properties:
209        compatible:
210          contains:
211            enum:
212              - mediatek,mt8183b-mali
213              - mediatek,mt8188-mali
214    then:
215      properties:
216        power-domains:
217          minItems: 3
218          maxItems: 3
219        power-domain-names:
220          items:
221            - const: core0
222            - const: core1
223            - const: core2
224      required:
225        - power-domains
226        - power-domain-names
227  - if:
228      properties:
229        compatible:
230          contains:
231            enum:
232              - mediatek,mt8186-mali
233              - mediatek,mt8370-mali
234    then:
235      properties:
236        power-domains:
237          minItems: 2
238          maxItems: 2
239        power-domain-names:
240          items:
241            - const: core0
242            - const: core1
243      required:
244        - power-domains
245        - power-domain-names
246  - if:
247      properties:
248        compatible:
249          contains:
250            const: mediatek,mt8192-mali
251    then:
252      properties:
253        power-domains:
254          minItems: 5
255        power-domain-names:
256          items:
257            - const: core0
258            - const: core1
259            - const: core2
260            - const: core3
261            - const: core4
262      required:
263        - power-domains
264        - power-domain-names
265  - if:
266      properties:
267        compatible:
268          contains:
269            const: rockchip,rk3568-mali
270    then:
271      properties:
272        clocks:
273          minItems: 2
274        clock-names:
275          items:
276            - const: gpu
277            - const: bus
278        power-domains:
279          maxItems: 1
280        power-domain-names: false
281      required:
282        - clock-names
283
284examples:
285  - |
286    #include <dt-bindings/interrupt-controller/irq.h>
287    #include <dt-bindings/interrupt-controller/arm-gic.h>
288
289    gpu@ffe40000 {
290      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
291      reg = <0xffe40000 0x10000>;
292      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
293             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
294             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
295      interrupt-names = "job", "mmu", "gpu";
296      clocks = <&clk 1>;
297      mali-supply = <&vdd_gpu>;
298      operating-points-v2 = <&gpu_opp_table>;
299      resets = <&reset 0>, <&reset 1>;
300    };
301
302    gpu_opp_table: opp-table {
303      compatible = "operating-points-v2";
304
305      opp-533000000 {
306        opp-hz = /bits/ 64 <533000000>;
307        opp-microvolt = <1250000>;
308      };
309      opp-450000000 {
310        opp-hz = /bits/ 64 <450000000>;
311        opp-microvolt = <1150000>;
312      };
313      opp-400000000 {
314        opp-hz = /bits/ 64 <400000000>;
315        opp-microvolt = <1125000>;
316      };
317      opp-350000000 {
318        opp-hz = /bits/ 64 <350000000>;
319        opp-microvolt = <1075000>;
320      };
321      opp-266000000 {
322        opp-hz = /bits/ 64 <266000000>;
323        opp-microvolt = <1025000>;
324      };
325      opp-160000000 {
326        opp-hz = /bits/ 64 <160000000>;
327        opp-microvolt = <925000>;
328      };
329      opp-100000000 {
330        opp-hz = /bits/ 64 <100000000>;
331        opp-microvolt = <912500>;
332      };
333    };
334
335...
336