xref: /linux/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml (revision beaea9c4ba2d8ef1b10223dc3a75a7d7be3e5cd9) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - allwinner,sun50i-h616-mali
21              - amlogic,meson-g12a-mali
22              - mediatek,mt8183-mali
23              - mediatek,mt8183b-mali
24              - mediatek,mt8186-mali
25              - realtek,rtd1619-mali
26              - renesas,r9a07g044-mali
27              - renesas,r9a07g054-mali
28              - renesas,r9a09g047-mali
29              - renesas,r9a09g056-mali
30              - renesas,r9a09g057-mali
31              - rockchip,px30-mali
32              - rockchip,rk3562-mali
33              - rockchip,rk3568-mali
34              - rockchip,rk3576-mali
35          - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
36      - items:
37          - enum:
38              - mediatek,mt8195-mali
39          - const: mediatek,mt8192-mali
40          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
41      - items:
42          - enum:
43              - allwinner,sun55i-a523-mali
44              - mediatek,mt8188-mali
45              - mediatek,mt8192-mali
46              - mediatek,mt8370-mali
47          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
48
49  reg:
50    maxItems: 1
51
52  interrupts:
53    minItems: 3
54    items:
55      - description: Job interrupt
56      - description: MMU interrupt
57      - description: GPU interrupt
58      - description: Event interrupt
59
60  interrupt-names:
61    minItems: 3
62    items:
63      - const: job
64      - const: mmu
65      - const: gpu
66      - const: event
67
68  clocks:
69    minItems: 1
70    maxItems: 3
71
72  clock-names: true
73
74  mali-supply: true
75
76  sram-supply: true
77
78  operating-points-v2: true
79
80  power-domains:
81    minItems: 1
82    maxItems: 5
83
84  power-domain-names:
85    minItems: 2
86    maxItems: 5
87
88  resets:
89    minItems: 1
90    maxItems: 3
91
92  reset-names: true
93
94  "#cooling-cells":
95    const: 2
96
97  dynamic-power-coefficient:
98    $ref: /schemas/types.yaml#/definitions/uint32
99    description:
100      A u32 value that represents the running time dynamic
101      power coefficient in units of uW/MHz/V^2. The
102      coefficient can either be calculated from power
103      measurements or derived by analysis.
104
105      The dynamic power consumption of the GPU is
106      proportional to the square of the Voltage (V) and
107      the clock frequency (f). The coefficient is used to
108      calculate the dynamic power as below -
109
110      Pdyn = dynamic-power-coefficient * V^2 * f
111
112      where voltage is in V, frequency is in MHz.
113
114  dma-coherent: true
115
116  nvmem-cell-names:
117    items:
118      - const: speed-bin
119
120  nvmem-cells:
121    maxItems: 1
122
123required:
124  - compatible
125  - reg
126  - interrupts
127  - interrupt-names
128  - clocks
129
130additionalProperties: false
131
132allOf:
133  - if:
134      properties:
135        compatible:
136          contains:
137            const: amlogic,meson-g12a-mali
138    then:
139      properties:
140        power-domains:
141          maxItems: 1
142        power-domain-names: false
143      required:
144        - resets
145  - if:
146      properties:
147        compatible:
148          contains:
149            enum:
150              - renesas,r9a07g044-mali
151              - renesas,r9a07g054-mali
152              - renesas,r9a09g047-mali
153              - renesas,r9a09g056-mali
154              - renesas,r9a09g057-mali
155    then:
156      properties:
157        interrupts:
158          minItems: 4
159        interrupt-names:
160          minItems: 4
161        clocks:
162          minItems: 3
163        clock-names:
164          items:
165            - const: gpu
166            - const: bus
167            - const: bus_ace
168        power-domains:
169          maxItems: 1
170        power-domain-names: false
171        resets:
172          minItems: 3
173        reset-names:
174          items:
175            - const: rst
176            - const: axi_rst
177            - const: ace_rst
178      required:
179        - clock-names
180        - power-domains
181        - resets
182        - reset-names
183  - if:
184      properties:
185        compatible:
186          contains:
187            const: mediatek,mt8183-mali
188    then:
189      properties:
190        power-domains:
191          minItems: 3
192          maxItems: 3
193        power-domain-names:
194          items:
195            - const: core0
196            - const: core1
197            - const: core2
198
199      required:
200        - sram-supply
201        - power-domains
202        - power-domain-names
203    else:
204      properties:
205        sram-supply: false
206  - if:
207      properties:
208        compatible:
209          contains:
210            enum:
211              - mediatek,mt8183b-mali
212              - mediatek,mt8188-mali
213    then:
214      properties:
215        power-domains:
216          minItems: 3
217          maxItems: 3
218        power-domain-names:
219          items:
220            - const: core0
221            - const: core1
222            - const: core2
223      required:
224        - power-domains
225        - power-domain-names
226  - if:
227      properties:
228        compatible:
229          contains:
230            enum:
231              - mediatek,mt8186-mali
232              - mediatek,mt8370-mali
233    then:
234      properties:
235        power-domains:
236          minItems: 2
237          maxItems: 2
238        power-domain-names:
239          items:
240            - const: core0
241            - const: core1
242      required:
243        - power-domains
244        - power-domain-names
245  - if:
246      properties:
247        compatible:
248          contains:
249            const: mediatek,mt8192-mali
250    then:
251      properties:
252        power-domains:
253          minItems: 5
254        power-domain-names:
255          items:
256            - const: core0
257            - const: core1
258            - const: core2
259            - const: core3
260            - const: core4
261      required:
262        - power-domains
263        - power-domain-names
264  - if:
265      properties:
266        compatible:
267          contains:
268            const: rockchip,rk3568-mali
269    then:
270      properties:
271        clocks:
272          minItems: 2
273        clock-names:
274          items:
275            - const: gpu
276            - const: bus
277        power-domains:
278          maxItems: 1
279        power-domain-names: false
280      required:
281        - clock-names
282
283examples:
284  - |
285    #include <dt-bindings/interrupt-controller/irq.h>
286    #include <dt-bindings/interrupt-controller/arm-gic.h>
287
288    gpu@ffe40000 {
289      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
290      reg = <0xffe40000 0x10000>;
291      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
292             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
293             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
294      interrupt-names = "job", "mmu", "gpu";
295      clocks = <&clk 1>;
296      mali-supply = <&vdd_gpu>;
297      operating-points-v2 = <&gpu_opp_table>;
298      resets = <&reset 0>, <&reset 1>;
299    };
300
301    gpu_opp_table: opp-table {
302      compatible = "operating-points-v2";
303
304      opp-533000000 {
305        opp-hz = /bits/ 64 <533000000>;
306        opp-microvolt = <1250000>;
307      };
308      opp-450000000 {
309        opp-hz = /bits/ 64 <450000000>;
310        opp-microvolt = <1150000>;
311      };
312      opp-400000000 {
313        opp-hz = /bits/ 64 <400000000>;
314        opp-microvolt = <1125000>;
315      };
316      opp-350000000 {
317        opp-hz = /bits/ 64 <350000000>;
318        opp-microvolt = <1075000>;
319      };
320      opp-266000000 {
321        opp-hz = /bits/ 64 <266000000>;
322        opp-microvolt = <1025000>;
323      };
324      opp-160000000 {
325        opp-hz = /bits/ 64 <160000000>;
326        opp-microvolt = <925000>;
327      };
328      opp-100000000 {
329        opp-hz = /bits/ 64 <100000000>;
330        opp-microvolt = <912500>;
331      };
332    };
333
334...
335