xref: /linux/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml (revision 7a012a692e7cfbca245d195a80f23634d3d74fcc) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - allwinner,sun50i-h616-mali
21              - amlogic,meson-g12a-mali
22              - mediatek,mt8183-mali
23              - mediatek,mt8183b-mali
24              - mediatek,mt8186-mali
25              - realtek,rtd1619-mali
26              - renesas,r9a07g044-mali
27              - renesas,r9a07g054-mali
28              - renesas,r9a09g057-mali
29              - rockchip,px30-mali
30              - rockchip,rk3562-mali
31              - rockchip,rk3568-mali
32              - rockchip,rk3576-mali
33          - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
34      - items:
35          - enum:
36              - mediatek,mt8195-mali
37          - const: mediatek,mt8192-mali
38          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
39      - items:
40          - enum:
41              - mediatek,mt8188-mali
42              - mediatek,mt8192-mali
43          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
44
45  reg:
46    maxItems: 1
47
48  interrupts:
49    minItems: 3
50    items:
51      - description: Job interrupt
52      - description: MMU interrupt
53      - description: GPU interrupt
54      - description: Event interrupt
55
56  interrupt-names:
57    minItems: 3
58    items:
59      - const: job
60      - const: mmu
61      - const: gpu
62      - const: event
63
64  clocks:
65    minItems: 1
66    maxItems: 3
67
68  clock-names: true
69
70  mali-supply: true
71
72  sram-supply: true
73
74  operating-points-v2: true
75
76  power-domains:
77    minItems: 1
78    maxItems: 5
79
80  power-domain-names:
81    minItems: 2
82    maxItems: 5
83
84  resets:
85    minItems: 1
86    maxItems: 3
87
88  reset-names: true
89
90  "#cooling-cells":
91    const: 2
92
93  dynamic-power-coefficient:
94    $ref: /schemas/types.yaml#/definitions/uint32
95    description:
96      A u32 value that represents the running time dynamic
97      power coefficient in units of uW/MHz/V^2. The
98      coefficient can either be calculated from power
99      measurements or derived by analysis.
100
101      The dynamic power consumption of the GPU is
102      proportional to the square of the Voltage (V) and
103      the clock frequency (f). The coefficient is used to
104      calculate the dynamic power as below -
105
106      Pdyn = dynamic-power-coefficient * V^2 * f
107
108      where voltage is in V, frequency is in MHz.
109
110  dma-coherent: true
111
112  nvmem-cell-names:
113    items:
114      - const: speed-bin
115
116  nvmem-cells:
117    maxItems: 1
118
119required:
120  - compatible
121  - reg
122  - interrupts
123  - interrupt-names
124  - clocks
125
126additionalProperties: false
127
128allOf:
129  - if:
130      properties:
131        compatible:
132          contains:
133            const: amlogic,meson-g12a-mali
134    then:
135      properties:
136        power-domains:
137          maxItems: 1
138        power-domain-names: false
139      required:
140        - resets
141  - if:
142      properties:
143        compatible:
144          contains:
145            enum:
146              - renesas,r9a07g044-mali
147              - renesas,r9a07g054-mali
148              - renesas,r9a09g057-mali
149    then:
150      properties:
151        interrupts:
152          minItems: 4
153        interrupt-names:
154          minItems: 4
155        clocks:
156          minItems: 3
157        clock-names:
158          items:
159            - const: gpu
160            - const: bus
161            - const: bus_ace
162        power-domains:
163          maxItems: 1
164        power-domain-names: false
165        resets:
166          minItems: 3
167        reset-names:
168          items:
169            - const: rst
170            - const: axi_rst
171            - const: ace_rst
172      required:
173        - clock-names
174        - power-domains
175        - resets
176        - reset-names
177  - if:
178      properties:
179        compatible:
180          contains:
181            const: mediatek,mt8183-mali
182    then:
183      properties:
184        power-domains:
185          minItems: 3
186          maxItems: 3
187        power-domain-names:
188          items:
189            - const: core0
190            - const: core1
191            - const: core2
192
193      required:
194        - sram-supply
195        - power-domains
196        - power-domain-names
197    else:
198      properties:
199        sram-supply: false
200  - if:
201      properties:
202        compatible:
203          contains:
204            enum:
205              - mediatek,mt8183b-mali
206              - mediatek,mt8188-mali
207    then:
208      properties:
209        power-domains:
210          minItems: 3
211          maxItems: 3
212        power-domain-names:
213          items:
214            - const: core0
215            - const: core1
216            - const: core2
217      required:
218        - power-domains
219        - power-domain-names
220  - if:
221      properties:
222        compatible:
223          contains:
224            const: mediatek,mt8186-mali
225    then:
226      properties:
227        power-domains:
228          minItems: 2
229          maxItems: 2
230        power-domain-names:
231          items:
232            - const: core0
233            - const: core1
234      required:
235        - power-domains
236        - power-domain-names
237  - if:
238      properties:
239        compatible:
240          contains:
241            const: mediatek,mt8192-mali
242    then:
243      properties:
244        power-domains:
245          minItems: 5
246        power-domain-names:
247          items:
248            - const: core0
249            - const: core1
250            - const: core2
251            - const: core3
252            - const: core4
253      required:
254        - power-domains
255        - power-domain-names
256  - if:
257      properties:
258        compatible:
259          contains:
260            const: rockchip,rk3568-mali
261    then:
262      properties:
263        clocks:
264          minItems: 2
265        clock-names:
266          items:
267            - const: gpu
268            - const: bus
269        power-domains:
270          maxItems: 1
271        power-domain-names: false
272      required:
273        - clock-names
274
275examples:
276  - |
277    #include <dt-bindings/interrupt-controller/irq.h>
278    #include <dt-bindings/interrupt-controller/arm-gic.h>
279
280    gpu@ffe40000 {
281      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
282      reg = <0xffe40000 0x10000>;
283      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
284             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
285             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
286      interrupt-names = "job", "mmu", "gpu";
287      clocks = <&clk 1>;
288      mali-supply = <&vdd_gpu>;
289      operating-points-v2 = <&gpu_opp_table>;
290      resets = <&reset 0>, <&reset 1>;
291    };
292
293    gpu_opp_table: opp-table {
294      compatible = "operating-points-v2";
295
296      opp-533000000 {
297        opp-hz = /bits/ 64 <533000000>;
298        opp-microvolt = <1250000>;
299      };
300      opp-450000000 {
301        opp-hz = /bits/ 64 <450000000>;
302        opp-microvolt = <1150000>;
303      };
304      opp-400000000 {
305        opp-hz = /bits/ 64 <400000000>;
306        opp-microvolt = <1125000>;
307      };
308      opp-350000000 {
309        opp-hz = /bits/ 64 <350000000>;
310        opp-microvolt = <1075000>;
311      };
312      opp-266000000 {
313        opp-hz = /bits/ 64 <266000000>;
314        opp-microvolt = <1025000>;
315      };
316      opp-160000000 {
317        opp-hz = /bits/ 64 <160000000>;
318        opp-microvolt = <925000>;
319      };
320      opp-100000000 {
321        opp-hz = /bits/ 64 <100000000>;
322        opp-microvolt = <912500>;
323      };
324    };
325
326...
327