1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ARM Mali Bifrost GPU 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12properties: 13 $nodename: 14 pattern: '^gpu@[a-f0-9]+$' 15 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - amlogic,meson-g12a-mali 21 - mediatek,mt8183-mali 22 - mediatek,mt8183b-mali 23 - mediatek,mt8186-mali 24 - realtek,rtd1619-mali 25 - renesas,r9a07g044-mali 26 - renesas,r9a07g054-mali 27 - rockchip,px30-mali 28 - rockchip,rk3568-mali 29 - rockchip,rk3576-mali 30 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable 31 - items: 32 - enum: 33 - mediatek,mt8195-mali 34 - const: mediatek,mt8192-mali 35 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable 36 - items: 37 - enum: 38 - mediatek,mt8188-mali 39 - mediatek,mt8192-mali 40 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable 41 42 reg: 43 maxItems: 1 44 45 interrupts: 46 minItems: 3 47 items: 48 - description: Job interrupt 49 - description: MMU interrupt 50 - description: GPU interrupt 51 - description: Event interrupt 52 53 interrupt-names: 54 minItems: 3 55 items: 56 - const: job 57 - const: mmu 58 - const: gpu 59 - const: event 60 61 clocks: 62 minItems: 1 63 maxItems: 3 64 65 clock-names: true 66 67 mali-supply: true 68 69 sram-supply: true 70 71 operating-points-v2: true 72 73 power-domains: 74 minItems: 1 75 maxItems: 5 76 77 power-domain-names: 78 minItems: 2 79 maxItems: 5 80 81 resets: 82 minItems: 1 83 maxItems: 3 84 85 reset-names: true 86 87 "#cooling-cells": 88 const: 2 89 90 dynamic-power-coefficient: 91 $ref: /schemas/types.yaml#/definitions/uint32 92 description: 93 A u32 value that represents the running time dynamic 94 power coefficient in units of uW/MHz/V^2. The 95 coefficient can either be calculated from power 96 measurements or derived by analysis. 97 98 The dynamic power consumption of the GPU is 99 proportional to the square of the Voltage (V) and 100 the clock frequency (f). The coefficient is used to 101 calculate the dynamic power as below - 102 103 Pdyn = dynamic-power-coefficient * V^2 * f 104 105 where voltage is in V, frequency is in MHz. 106 107 dma-coherent: true 108 109 nvmem-cell-names: 110 items: 111 - const: speed-bin 112 113 nvmem-cells: 114 maxItems: 1 115 116required: 117 - compatible 118 - reg 119 - interrupts 120 - interrupt-names 121 - clocks 122 123additionalProperties: false 124 125allOf: 126 - if: 127 properties: 128 compatible: 129 contains: 130 const: amlogic,meson-g12a-mali 131 then: 132 properties: 133 power-domains: 134 maxItems: 1 135 power-domain-names: false 136 required: 137 - resets 138 - if: 139 properties: 140 compatible: 141 contains: 142 enum: 143 - renesas,r9a07g044-mali 144 - renesas,r9a07g054-mali 145 then: 146 properties: 147 interrupts: 148 minItems: 4 149 interrupt-names: 150 minItems: 4 151 clocks: 152 minItems: 3 153 clock-names: 154 items: 155 - const: gpu 156 - const: bus 157 - const: bus_ace 158 power-domains: 159 maxItems: 1 160 power-domain-names: false 161 resets: 162 minItems: 3 163 reset-names: 164 items: 165 - const: rst 166 - const: axi_rst 167 - const: ace_rst 168 required: 169 - clock-names 170 - power-domains 171 - resets 172 - reset-names 173 - if: 174 properties: 175 compatible: 176 contains: 177 const: mediatek,mt8183-mali 178 then: 179 properties: 180 power-domains: 181 minItems: 3 182 maxItems: 3 183 power-domain-names: 184 items: 185 - const: core0 186 - const: core1 187 - const: core2 188 189 required: 190 - sram-supply 191 - power-domains 192 - power-domain-names 193 else: 194 properties: 195 sram-supply: false 196 - if: 197 properties: 198 compatible: 199 contains: 200 enum: 201 - mediatek,mt8183b-mali 202 - mediatek,mt8188-mali 203 then: 204 properties: 205 power-domains: 206 minItems: 3 207 maxItems: 3 208 power-domain-names: 209 items: 210 - const: core0 211 - const: core1 212 - const: core2 213 required: 214 - power-domains 215 - power-domain-names 216 - if: 217 properties: 218 compatible: 219 contains: 220 const: mediatek,mt8186-mali 221 then: 222 properties: 223 power-domains: 224 minItems: 2 225 maxItems: 2 226 power-domain-names: 227 items: 228 - const: core0 229 - const: core1 230 required: 231 - power-domains 232 - power-domain-names 233 - if: 234 properties: 235 compatible: 236 contains: 237 const: mediatek,mt8192-mali 238 then: 239 properties: 240 power-domains: 241 minItems: 5 242 power-domain-names: 243 items: 244 - const: core0 245 - const: core1 246 - const: core2 247 - const: core3 248 - const: core4 249 required: 250 - power-domains 251 - power-domain-names 252 - if: 253 properties: 254 compatible: 255 contains: 256 const: rockchip,rk3568-mali 257 then: 258 properties: 259 clocks: 260 minItems: 2 261 clock-names: 262 items: 263 - const: gpu 264 - const: bus 265 power-domains: 266 maxItems: 1 267 power-domain-names: false 268 required: 269 - clock-names 270 271examples: 272 - | 273 #include <dt-bindings/interrupt-controller/irq.h> 274 #include <dt-bindings/interrupt-controller/arm-gic.h> 275 276 gpu@ffe40000 { 277 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; 278 reg = <0xffe40000 0x10000>; 279 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 282 interrupt-names = "job", "mmu", "gpu"; 283 clocks = <&clk 1>; 284 mali-supply = <&vdd_gpu>; 285 operating-points-v2 = <&gpu_opp_table>; 286 resets = <&reset 0>, <&reset 1>; 287 }; 288 289 gpu_opp_table: opp-table { 290 compatible = "operating-points-v2"; 291 292 opp-533000000 { 293 opp-hz = /bits/ 64 <533000000>; 294 opp-microvolt = <1250000>; 295 }; 296 opp-450000000 { 297 opp-hz = /bits/ 64 <450000000>; 298 opp-microvolt = <1150000>; 299 }; 300 opp-400000000 { 301 opp-hz = /bits/ 64 <400000000>; 302 opp-microvolt = <1125000>; 303 }; 304 opp-350000000 { 305 opp-hz = /bits/ 64 <350000000>; 306 opp-microvolt = <1075000>; 307 }; 308 opp-266000000 { 309 opp-hz = /bits/ 64 <266000000>; 310 opp-microvolt = <1025000>; 311 }; 312 opp-160000000 { 313 opp-hz = /bits/ 64 <160000000>; 314 opp-microvolt = <925000>; 315 }; 316 opp-100000000 { 317 opp-hz = /bits/ 64 <100000000>; 318 opp-microvolt = <912500>; 319 }; 320 }; 321 322... 323