xref: /linux/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml (revision 05d32474ab547fb097cfe3f3eb00a2aa7cdf4067) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - allwinner,sun50i-h616-mali
21              - amlogic,meson-g12a-mali
22              - mediatek,mt8183-mali
23              - mediatek,mt8183b-mali
24              - mediatek,mt8186-mali
25              - mediatek,mt8365-mali
26              - realtek,rtd1619-mali
27              - renesas,r9a07g044-mali
28              - renesas,r9a07g054-mali
29              - renesas,r9a08g046-mali
30              - renesas,r9a09g047-mali
31              - renesas,r9a09g056-mali
32              - renesas,r9a09g057-mali
33              - rockchip,px30-mali
34              - rockchip,rk3562-mali
35              - rockchip,rk3568-mali
36              - rockchip,rk3576-mali
37          - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
38      - items:
39          - enum:
40              - mediatek,mt8195-mali
41          - const: mediatek,mt8192-mali
42          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
43      - items:
44          - enum:
45              - allwinner,sun55i-a523-mali
46              - mediatek,mt8188-mali
47              - mediatek,mt8192-mali
48              - mediatek,mt8370-mali
49          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
50
51  reg:
52    maxItems: 1
53
54  interrupts:
55    minItems: 3
56    items:
57      - description: Job interrupt
58      - description: MMU interrupt
59      - description: GPU interrupt
60      - description: Event interrupt
61
62  interrupt-names:
63    minItems: 3
64    items:
65      - const: job
66      - const: mmu
67      - const: gpu
68      - const: event
69
70  clocks:
71    minItems: 1
72    maxItems: 3
73
74  clock-names: true
75
76  mali-supply: true
77
78  sram-supply: true
79
80  operating-points-v2: true
81
82  power-domains:
83    minItems: 1
84    maxItems: 5
85
86  power-domain-names:
87    minItems: 2
88    maxItems: 5
89
90  resets:
91    minItems: 1
92    maxItems: 3
93
94  reset-names: true
95
96  "#cooling-cells":
97    const: 2
98
99  dynamic-power-coefficient:
100    $ref: /schemas/types.yaml#/definitions/uint32
101    description:
102      A u32 value that represents the running time dynamic
103      power coefficient in units of uW/MHz/V^2. The
104      coefficient can either be calculated from power
105      measurements or derived by analysis.
106
107      The dynamic power consumption of the GPU is
108      proportional to the square of the Voltage (V) and
109      the clock frequency (f). The coefficient is used to
110      calculate the dynamic power as below -
111
112      Pdyn = dynamic-power-coefficient * V^2 * f
113
114      where voltage is in V, frequency is in MHz.
115
116  dma-coherent: true
117
118  nvmem-cell-names:
119    items:
120      - const: speed-bin
121
122  nvmem-cells:
123    maxItems: 1
124
125required:
126  - compatible
127  - reg
128  - interrupts
129  - interrupt-names
130  - clocks
131
132additionalProperties: false
133
134allOf:
135  - if:
136      properties:
137        compatible:
138          contains:
139            const: amlogic,meson-g12a-mali
140    then:
141      properties:
142        power-domains:
143          maxItems: 1
144        power-domain-names: false
145      required:
146        - resets
147  - if:
148      properties:
149        compatible:
150          contains:
151            enum:
152              - renesas,r9a07g044-mali
153              - renesas,r9a07g054-mali
154              - renesas,r9a08g046-mali
155              - renesas,r9a09g047-mali
156              - renesas,r9a09g056-mali
157              - renesas,r9a09g057-mali
158    then:
159      properties:
160        interrupts:
161          minItems: 4
162        interrupt-names:
163          minItems: 4
164        clocks:
165          minItems: 3
166        clock-names:
167          items:
168            - const: gpu
169            - const: bus
170            - const: bus_ace
171        power-domains:
172          maxItems: 1
173        power-domain-names: false
174        resets:
175          minItems: 3
176        reset-names:
177          items:
178            - const: rst
179            - const: axi_rst
180            - const: ace_rst
181      required:
182        - clock-names
183        - power-domains
184        - resets
185        - reset-names
186  - if:
187      properties:
188        compatible:
189          contains:
190            const: mediatek,mt8183-mali
191    then:
192      properties:
193        power-domains:
194          minItems: 3
195          maxItems: 3
196        power-domain-names:
197          items:
198            - const: core0
199            - const: core1
200            - const: core2
201
202      required:
203        - sram-supply
204        - power-domains
205        - power-domain-names
206    else:
207      properties:
208        sram-supply: false
209  - if:
210      properties:
211        compatible:
212          contains:
213            enum:
214              - mediatek,mt8183b-mali
215              - mediatek,mt8188-mali
216    then:
217      properties:
218        power-domains:
219          minItems: 3
220          maxItems: 3
221        power-domain-names:
222          items:
223            - const: core0
224            - const: core1
225            - const: core2
226      required:
227        - power-domains
228        - power-domain-names
229  - if:
230      properties:
231        compatible:
232          contains:
233            enum:
234              - mediatek,mt8186-mali
235              - mediatek,mt8370-mali
236    then:
237      properties:
238        power-domains:
239          minItems: 2
240          maxItems: 2
241        power-domain-names:
242          items:
243            - const: core0
244            - const: core1
245      required:
246        - power-domains
247        - power-domain-names
248  - if:
249      properties:
250        compatible:
251          contains:
252            const: mediatek,mt8192-mali
253    then:
254      properties:
255        power-domains:
256          minItems: 5
257        power-domain-names:
258          items:
259            - const: core0
260            - const: core1
261            - const: core2
262            - const: core3
263            - const: core4
264      required:
265        - power-domains
266        - power-domain-names
267  - if:
268      properties:
269        compatible:
270          contains:
271            const: rockchip,rk3568-mali
272    then:
273      properties:
274        clocks:
275          minItems: 2
276        clock-names:
277          items:
278            - const: gpu
279            - const: bus
280        power-domains:
281          maxItems: 1
282        power-domain-names: false
283      required:
284        - clock-names
285
286examples:
287  - |
288    #include <dt-bindings/interrupt-controller/irq.h>
289    #include <dt-bindings/interrupt-controller/arm-gic.h>
290
291    gpu@ffe40000 {
292      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
293      reg = <0xffe40000 0x10000>;
294      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
295             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
296             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
297      interrupt-names = "job", "mmu", "gpu";
298      clocks = <&clk 1>;
299      mali-supply = <&vdd_gpu>;
300      operating-points-v2 = <&gpu_opp_table>;
301      resets = <&reset 0>, <&reset 1>;
302    };
303
304    gpu_opp_table: opp-table {
305      compatible = "operating-points-v2";
306
307      opp-533000000 {
308        opp-hz = /bits/ 64 <533000000>;
309        opp-microvolt = <1250000>;
310      };
311      opp-450000000 {
312        opp-hz = /bits/ 64 <450000000>;
313        opp-microvolt = <1150000>;
314      };
315      opp-400000000 {
316        opp-hz = /bits/ 64 <400000000>;
317        opp-microvolt = <1125000>;
318      };
319      opp-350000000 {
320        opp-hz = /bits/ 64 <350000000>;
321        opp-microvolt = <1075000>;
322      };
323      opp-266000000 {
324        opp-hz = /bits/ 64 <266000000>;
325        opp-microvolt = <1025000>;
326      };
327      opp-160000000 {
328        opp-hz = /bits/ 64 <160000000>;
329        opp-microvolt = <925000>;
330      };
331      opp-100000000 {
332        opp-hz = /bits/ 64 <100000000>;
333        opp-microvolt = <912500>;
334      };
335    };
336
337...
338