1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ARM Mali Bifrost GPU 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12properties: 13 $nodename: 14 pattern: '^gpu@[a-f0-9]+$' 15 16 compatible: 17 items: 18 - enum: 19 - amlogic,meson-g12a-mali 20 - realtek,rtd1619-mali 21 - rockchip,px30-mali 22 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable 23 24 reg: 25 maxItems: 1 26 27 interrupts: 28 items: 29 - description: Job interrupt 30 - description: MMU interrupt 31 - description: GPU interrupt 32 33 interrupt-names: 34 items: 35 - const: job 36 - const: mmu 37 - const: gpu 38 39 clocks: 40 maxItems: 1 41 42 mali-supply: true 43 44 operating-points-v2: true 45 46 power-domains: 47 maxItems: 1 48 49 resets: 50 maxItems: 2 51 52 "#cooling-cells": 53 const: 2 54 55 dynamic-power-coefficient: 56 $ref: '/schemas/types.yaml#/definitions/uint32' 57 description: 58 A u32 value that represents the running time dynamic 59 power coefficient in units of uW/MHz/V^2. The 60 coefficient can either be calculated from power 61 measurements or derived by analysis. 62 63 The dynamic power consumption of the GPU is 64 proportional to the square of the Voltage (V) and 65 the clock frequency (f). The coefficient is used to 66 calculate the dynamic power as below - 67 68 Pdyn = dynamic-power-coefficient * V^2 * f 69 70 where voltage is in V, frequency is in MHz. 71 72 dma-coherent: true 73 74required: 75 - compatible 76 - reg 77 - interrupts 78 - interrupt-names 79 - clocks 80 81additionalProperties: false 82 83allOf: 84 - if: 85 properties: 86 compatible: 87 contains: 88 const: amlogic,meson-g12a-mali 89 then: 90 required: 91 - resets 92 93examples: 94 - | 95 #include <dt-bindings/interrupt-controller/irq.h> 96 #include <dt-bindings/interrupt-controller/arm-gic.h> 97 98 gpu@ffe40000 { 99 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; 100 reg = <0xffe40000 0x10000>; 101 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 102 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 103 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 104 interrupt-names = "job", "mmu", "gpu"; 105 clocks = <&clk 1>; 106 mali-supply = <&vdd_gpu>; 107 operating-points-v2 = <&gpu_opp_table>; 108 resets = <&reset 0>, <&reset 1>; 109 }; 110 111 gpu_opp_table: opp_table0 { 112 compatible = "operating-points-v2"; 113 114 opp-533000000 { 115 opp-hz = /bits/ 64 <533000000>; 116 opp-microvolt = <1250000>; 117 }; 118 opp-450000000 { 119 opp-hz = /bits/ 64 <450000000>; 120 opp-microvolt = <1150000>; 121 }; 122 opp-400000000 { 123 opp-hz = /bits/ 64 <400000000>; 124 opp-microvolt = <1125000>; 125 }; 126 opp-350000000 { 127 opp-hz = /bits/ 64 <350000000>; 128 opp-microvolt = <1075000>; 129 }; 130 opp-266000000 { 131 opp-hz = /bits/ 64 <266000000>; 132 opp-microvolt = <1025000>; 133 }; 134 opp-160000000 { 135 opp-hz = /bits/ 64 <160000000>; 136 opp-microvolt = <925000>; 137 }; 138 opp-100000000 { 139 opp-hz = /bits/ 64 <100000000>; 140 opp-microvolt = <912500>; 141 }; 142 }; 143 144... 145