xref: /linux/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml (revision 34dc1baba215b826e454b8d19e4f24adbeb7d00d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2022 Unisoc Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Unisoc EIC controller
9
10maintainers:
11  - Orson Zhai <orsonzhai@gmail.com>
12  - Baolin Wang <baolin.wang7@gmail.com>
13  - Chunyan Zhang <zhang.lyra@gmail.com>
14
15description: |
16  The EIC is the abbreviation of external interrupt controller, which can
17  be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
18  one is in digital chip, and another one is in PMIC. The digital chip EIC
19  controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
20  EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
21  module.
22
23  The EIC-debounce sub-module provides up to 8 source input signal
24  connections. A debounce mechanism is used to capture the input signals'
25  stable status (millisecond resolution) and a single-trigger mechanism
26  is introduced into this sub-module to enhance the input event detection
27  reliability. In addition, this sub-module's clock can be shut off
28  automatically to reduce power dissipation. Moreover the debounce range
29  is from 1ms to 4s with a step size of 1ms. The input signal will be
30  ignored if it is asserted for less than 1 ms.
31
32  The EIC-latch sub-module is used to latch some special power down signals
33  and generate interrupts, since the EIC-latch does not depend on the APB
34  clock to capture signals.
35
36  The EIC-async sub-module uses a 32kHz clock to capture the short signals
37  (microsecond resolution) to generate interrupts by level or edge trigger.
38
39  The EIC-sync is similar with GPIO's input function, which is a synchronized
40  signal input register. It can generate interrupts by level or edge trigger
41  when detecting input signals.
42
43properties:
44  compatible:
45    oneOf:
46      - enum:
47          - sprd,sc9860-eic-debounce
48          - sprd,sc9860-eic-latch
49          - sprd,sc9860-eic-async
50          - sprd,sc9860-eic-sync
51          - sprd,sc2731-eic
52      - items:
53          - enum:
54              - sprd,ums512-eic-debounce
55          - const: sprd,sc9860-eic-debounce
56      - items:
57          - enum:
58              - sprd,ums512-eic-latch
59          - const: sprd,sc9860-eic-latch
60      - items:
61          - enum:
62              - sprd,ums512-eic-async
63          - const: sprd,sc9860-eic-async
64      - items:
65          - enum:
66              - sprd,ums512-eic-sync
67          - const: sprd,sc9860-eic-sync
68      - items:
69          - enum:
70              - sprd,sc2730-eic
71          - const: sprd,sc2731-eic
72
73  reg:
74    minItems: 1
75    maxItems: 3
76    description:
77      EIC controller can support maximum 3 banks which has its own
78      address base.
79
80  gpio-controller: true
81
82  "#gpio-cells":
83    const: 2
84
85  interrupt-controller: true
86
87  "#interrupt-cells":
88    const: 2
89
90  interrupts:
91    maxItems: 1
92    description:
93      The interrupt shared by all GPIO lines for this controller.
94
95required:
96  - compatible
97  - reg
98  - gpio-controller
99  - "#gpio-cells"
100  - interrupt-controller
101  - "#interrupt-cells"
102  - interrupts
103
104additionalProperties: false
105
106examples:
107  - |
108    #include <dt-bindings/interrupt-controller/arm-gic.h>
109
110    soc {
111        #address-cells = <2>;
112        #size-cells = <2>;
113
114        eic_debounce: gpio@40210000 {
115            compatible = "sprd,sc9860-eic-debounce";
116            reg = <0 0x40210000 0 0x80>;
117            gpio-controller;
118            #gpio-cells = <2>;
119            interrupt-controller;
120            #interrupt-cells = <2>;
121            interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
122        };
123    };
124...
125