1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: SpacemiT K1 GPIO controller 8 9maintainers: 10 - Yixun Lan <dlan@gentoo.org> 11 12description: 13 The controller's registers are organized as sets of eight 32-bit 14 registers with each set of port controlling 32 pins. A single 15 interrupt line is shared for all of the pins by the controller. 16 17properties: 18 $nodename: 19 pattern: "^gpio@[0-9a-f]+$" 20 21 compatible: 22 const: spacemit,k1-gpio 23 24 reg: 25 maxItems: 1 26 27 clocks: 28 items: 29 - description: GPIO Core Clock 30 - description: GPIO Bus Clock 31 32 clock-names: 33 items: 34 - const: core 35 - const: bus 36 37 resets: 38 maxItems: 1 39 40 gpio-controller: true 41 42 "#gpio-cells": 43 const: 3 44 description: 45 The first two cells are the GPIO bank index and offset inside the bank, 46 the third cell should specify GPIO flag. 47 48 gpio-ranges: true 49 50 interrupts: 51 maxItems: 1 52 53 interrupt-controller: true 54 55 "#interrupt-cells": 56 const: 3 57 description: 58 The first two cells are the GPIO bank index and offset inside the bank, 59 the third cell should specify interrupt flag. The controller does not 60 support level interrupts, so flags of IRQ_TYPE_LEVEL_HIGH, 61 IRQ_TYPE_LEVEL_LOW should not be used. 62 Refer <dt-bindings/interrupt-controller/irq.h> for valid flags. 63 64required: 65 - compatible 66 - reg 67 - clocks 68 - clock-names 69 - gpio-controller 70 - "#gpio-cells" 71 - interrupts 72 - interrupt-controller 73 - "#interrupt-cells" 74 - gpio-ranges 75 76additionalProperties: false 77 78examples: 79 - | 80 gpio@d4019000 { 81 compatible = "spacemit,k1-gpio"; 82 reg = <0xd4019000 0x800>; 83 clocks =<&ccu 9>, <&ccu 61>; 84 clock-names = "core", "bus"; 85 gpio-controller; 86 #gpio-cells = <3>; 87 interrupts = <58>; 88 interrupt-controller; 89 interrupt-parent = <&plic>; 90 #interrupt-cells = <3>; 91 gpio-ranges = <&pinctrl 0 0 0 32>, 92 <&pinctrl 1 0 32 32>, 93 <&pinctrl 2 0 64 32>, 94 <&pinctrl 3 0 96 32>; 95 }; 96... 97