xref: /linux/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml (revision 4fd18fc38757217c746aa063ba9e4729814dc737) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare APB GPIO controller
8
9description: |
10  Synopsys DesignWare GPIO controllers have a configurable number of ports,
11  each of which are intended to be represented as child nodes with the generic
12  GPIO-controller properties as desribed in this bindings file.
13
14maintainers:
15  - Hoan Tran <hoan@os.amperecomputing.com>
16  - Serge Semin <fancer.lancer@gmail.com>
17
18properties:
19  $nodename:
20    pattern: "^gpio@[0-9a-f]+$"
21
22  compatible:
23    const: snps,dw-apb-gpio
24
25  "#address-cells":
26    const: 1
27
28  "#size-cells":
29    const: 0
30
31  reg:
32    maxItems: 1
33
34  clocks:
35    minItems: 1
36    items:
37      - description: APB interface clock source
38      - description: DW GPIO debounce reference clock source
39
40  clock-names:
41    minItems: 1
42    items:
43      - const: bus
44      - const: db
45
46  resets:
47    maxItems: 1
48
49patternProperties:
50  "^gpio-(port|controller)@[0-9a-f]+$":
51    type: object
52    properties:
53      compatible:
54        const: snps,dw-apb-gpio-port
55
56      reg:
57        maxItems: 1
58
59      gpio-controller: true
60
61      '#gpio-cells':
62        const: 2
63
64      ngpios:
65        default: 32
66        minimum: 1
67        maximum: 32
68
69      snps,nr-gpios:
70        description: The number of GPIO pins exported by the port.
71        deprecated: true
72        $ref: /schemas/types.yaml#/definitions/uint32
73        default: 32
74        minimum: 1
75        maximum: 32
76
77      interrupts:
78        description: |
79          The interrupts to the parent controller raised when GPIOs generate
80          the interrupts. If the controller provides one combined interrupt
81          for all GPIOs, specify a single interrupt. If the controller provides
82          one interrupt for each GPIO, provide a list of interrupts that
83          correspond to each of the GPIO pins.
84        minItems: 1
85        maxItems: 32
86
87      interrupt-controller: true
88
89      '#interrupt-cells':
90        const: 2
91
92    required:
93      - compatible
94      - reg
95      - gpio-controller
96      - '#gpio-cells'
97
98    dependencies:
99      interrupt-controller: [ interrupts ]
100
101    additionalProperties: false
102
103additionalProperties: false
104
105required:
106  - compatible
107  - reg
108  - "#address-cells"
109  - "#size-cells"
110
111examples:
112  - |
113    gpio: gpio@20000 {
114      compatible = "snps,dw-apb-gpio";
115      reg = <0x20000 0x1000>;
116      #address-cells = <1>;
117      #size-cells = <0>;
118
119      porta: gpio-port@0 {
120        compatible = "snps,dw-apb-gpio-port";
121        reg = <0>;
122        gpio-controller;
123        #gpio-cells = <2>;
124        snps,nr-gpios = <8>;
125        interrupt-controller;
126        #interrupt-cells = <2>;
127        interrupt-parent = <&vic1>;
128        interrupts = <0>;
129      };
130
131      portb: gpio-port@1 {
132        compatible = "snps,dw-apb-gpio-port";
133        reg = <1>;
134        gpio-controller;
135        #gpio-cells = <2>;
136        snps,nr-gpios = <8>;
137      };
138    };
139...
140