17875f824SYash Shah# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 27875f824SYash Shah%YAML 1.2 37875f824SYash Shah--- 47875f824SYash Shah$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml# 57875f824SYash Shah$schema: http://devicetree.org/meta-schemas/core.yaml# 67875f824SYash Shah 77875f824SYash Shahtitle: SiFive GPIO controller 87875f824SYash Shah 97875f824SYash Shahmaintainers: 107875f824SYash Shah - Paul Walmsley <paul.walmsley@sifive.com> 117875f824SYash Shah 127875f824SYash Shahproperties: 137875f824SYash Shah compatible: 147875f824SYash Shah items: 1542cf244cSYash Shah - enum: 1642cf244cSYash Shah - sifive,fu540-c000-gpio 1742cf244cSYash Shah - sifive,fu740-c000-gpio 183933cf6aSDamien Le Moal - canaan,k210-gpiohs 197875f824SYash Shah - const: sifive,gpio0 207875f824SYash Shah 217875f824SYash Shah reg: 227875f824SYash Shah maxItems: 1 237875f824SYash Shah 247875f824SYash Shah interrupts: 257875f824SYash Shah description: 263933cf6aSDamien Le Moal Interrupt mapping, one per GPIO. Maximum 32 GPIOs. 277875f824SYash Shah minItems: 1 283933cf6aSDamien Le Moal maxItems: 32 297875f824SYash Shah 307875f824SYash Shah interrupt-controller: true 317875f824SYash Shah 327875f824SYash Shah "#interrupt-cells": 337875f824SYash Shah const: 2 347875f824SYash Shah 357875f824SYash Shah clocks: 367875f824SYash Shah maxItems: 1 377875f824SYash Shah 387875f824SYash Shah "#gpio-cells": 397875f824SYash Shah const: 2 407875f824SYash Shah 413933cf6aSDamien Le Moal ngpios: 423933cf6aSDamien Le Moal description: 433933cf6aSDamien Le Moal The number of GPIOs available on the controller implementation. 443933cf6aSDamien Le Moal It is 16 for the SiFive SoCs and 32 for the Canaan K210. 453933cf6aSDamien Le Moal minimum: 1 463933cf6aSDamien Le Moal maximum: 32 473933cf6aSDamien Le Moal default: 16 483933cf6aSDamien Le Moal 49*5cef38ddSAtul Khare gpio-line-names: 50*5cef38ddSAtul Khare minItems: 1 51*5cef38ddSAtul Khare maxItems: 32 52*5cef38ddSAtul Khare 537875f824SYash Shah gpio-controller: true 547875f824SYash Shah 557875f824SYash Shahrequired: 567875f824SYash Shah - compatible 577875f824SYash Shah - reg 587875f824SYash Shah - interrupts 597875f824SYash Shah - interrupt-controller 607875f824SYash Shah - "#interrupt-cells" 617875f824SYash Shah - "#gpio-cells" 627875f824SYash Shah - gpio-controller 637875f824SYash Shah 643933cf6aSDamien Le Moalif: 653933cf6aSDamien Le Moal properties: 663933cf6aSDamien Le Moal compatible: 673933cf6aSDamien Le Moal contains: 683933cf6aSDamien Le Moal enum: 693933cf6aSDamien Le Moal - sifive,fu540-c000-gpio 703933cf6aSDamien Le Moal - sifive,fu740-c000-gpio 713933cf6aSDamien Le Moalthen: 723933cf6aSDamien Le Moal required: 733933cf6aSDamien Le Moal - clocks 743933cf6aSDamien Le Moal 757875f824SYash ShahadditionalProperties: false 767875f824SYash Shah 777875f824SYash Shahexamples: 787875f824SYash Shah - | 797875f824SYash Shah #include <dt-bindings/clock/sifive-fu540-prci.h> 807875f824SYash Shah gpio@10060000 { 817875f824SYash Shah compatible = "sifive,fu540-c000-gpio", "sifive,gpio0"; 827875f824SYash Shah interrupt-parent = <&plic>; 834f453489SGeert Uytterhoeven interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>, 844f453489SGeert Uytterhoeven <17>, <18>, <19>, <20>, <21>, <22>; 85fba56184SRob Herring reg = <0x10060000 0x1000>; 860493692bSZong Li clocks = <&tlclk FU540_PRCI_CLK_TLCLK>; 877875f824SYash Shah gpio-controller; 887875f824SYash Shah #gpio-cells = <2>; 897875f824SYash Shah interrupt-controller; 907875f824SYash Shah #interrupt-cells = <2>; 917875f824SYash Shah }; 927875f824SYash Shah 937875f824SYash Shah... 94