1*40dc2270SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*40dc2270SThierry Reding%YAML 1.2 3*40dc2270SThierry Reding--- 4*40dc2270SThierry Reding$id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml# 5*40dc2270SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6*40dc2270SThierry Reding 7*40dc2270SThierry Redingtitle: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210) 8*40dc2270SThierry Reding 9*40dc2270SThierry Redingmaintainers: 10*40dc2270SThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11*40dc2270SThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12*40dc2270SThierry Reding 13*40dc2270SThierry Redingproperties: 14*40dc2270SThierry Reding compatible: 15*40dc2270SThierry Reding oneOf: 16*40dc2270SThierry Reding - enum: 17*40dc2270SThierry Reding - nvidia,tegra20-gpio 18*40dc2270SThierry Reding - nvidia,tegra30-gpio 19*40dc2270SThierry Reding 20*40dc2270SThierry Reding - items: 21*40dc2270SThierry Reding - enum: 22*40dc2270SThierry Reding - nvidia,tegra114-gpio 23*40dc2270SThierry Reding - nvidia,tegra124-gpio 24*40dc2270SThierry Reding - nvidia,tegra210-gpio 25*40dc2270SThierry Reding - const: nvidia,tegra30-gpio 26*40dc2270SThierry Reding 27*40dc2270SThierry Reding reg: 28*40dc2270SThierry Reding maxItems: 1 29*40dc2270SThierry Reding 30*40dc2270SThierry Reding interrupts: 31*40dc2270SThierry Reding description: The interrupt outputs from the controller. For Tegra20, 32*40dc2270SThierry Reding there should be 7 interrupts specified, and for Tegra30, there should 33*40dc2270SThierry Reding be 8 interrupts specified. 34*40dc2270SThierry Reding 35*40dc2270SThierry Reding "#gpio-cells": 36*40dc2270SThierry Reding description: The first cell is the pin number and the second cell is used 37*40dc2270SThierry Reding to specify the GPIO polarity (0 = active high, 1 = active low). 38*40dc2270SThierry Reding const: 2 39*40dc2270SThierry Reding 40*40dc2270SThierry Reding gpio-controller: true 41*40dc2270SThierry Reding 42*40dc2270SThierry Reding gpio-ranges: 43*40dc2270SThierry Reding maxItems: 1 44*40dc2270SThierry Reding 45*40dc2270SThierry Reding "#interrupt-cells": 46*40dc2270SThierry Reding description: | 47*40dc2270SThierry Reding Should be 2. The first cell is the GPIO number. The second cell is 48*40dc2270SThierry Reding used to specify flags: 49*40dc2270SThierry Reding 50*40dc2270SThierry Reding bits[3:0] trigger type and level flags: 51*40dc2270SThierry Reding 1 = low-to-high edge triggered. 52*40dc2270SThierry Reding 2 = high-to-low edge triggered. 53*40dc2270SThierry Reding 4 = active high level-sensitive. 54*40dc2270SThierry Reding 8 = active low level-sensitive. 55*40dc2270SThierry Reding 56*40dc2270SThierry Reding Valid combinations are 1, 2, 3, 4, 8. 57*40dc2270SThierry Reding const: 2 58*40dc2270SThierry Reding 59*40dc2270SThierry Reding interrupt-controller: true 60*40dc2270SThierry Reding 61*40dc2270SThierry RedingallOf: 62*40dc2270SThierry Reding - if: 63*40dc2270SThierry Reding properties: 64*40dc2270SThierry Reding compatible: 65*40dc2270SThierry Reding contains: 66*40dc2270SThierry Reding const: nvidia,tegra30-gpio 67*40dc2270SThierry Reding then: 68*40dc2270SThierry Reding properties: 69*40dc2270SThierry Reding interrupts: 70*40dc2270SThierry Reding minItems: 8 71*40dc2270SThierry Reding maxItems: 8 72*40dc2270SThierry Reding else: 73*40dc2270SThierry Reding properties: 74*40dc2270SThierry Reding interrupts: 75*40dc2270SThierry Reding minItems: 7 76*40dc2270SThierry Reding maxItems: 7 77*40dc2270SThierry Reding 78*40dc2270SThierry Redingrequired: 79*40dc2270SThierry Reding - compatible 80*40dc2270SThierry Reding - reg 81*40dc2270SThierry Reding - interrupts 82*40dc2270SThierry Reding - "#gpio-cells" 83*40dc2270SThierry Reding - gpio-controller 84*40dc2270SThierry Reding - "#interrupt-cells" 85*40dc2270SThierry Reding - interrupt-controller 86*40dc2270SThierry Reding 87*40dc2270SThierry RedingadditionalProperties: 88*40dc2270SThierry Reding type: object 89*40dc2270SThierry Reding required: 90*40dc2270SThierry Reding - gpio-hog 91*40dc2270SThierry Reding 92*40dc2270SThierry Redingexamples: 93*40dc2270SThierry Reding - | 94*40dc2270SThierry Reding #include <dt-bindings/interrupt-controller/arm-gic.h> 95*40dc2270SThierry Reding 96*40dc2270SThierry Reding gpio: gpio@6000d000 { 97*40dc2270SThierry Reding compatible = "nvidia,tegra20-gpio"; 98*40dc2270SThierry Reding reg = <0x6000d000 0x1000>; 99*40dc2270SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 100*40dc2270SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 101*40dc2270SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 102*40dc2270SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 103*40dc2270SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 104*40dc2270SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 105*40dc2270SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 106*40dc2270SThierry Reding #gpio-cells = <2>; 107*40dc2270SThierry Reding gpio-controller; 108*40dc2270SThierry Reding #interrupt-cells = <2>; 109*40dc2270SThierry Reding interrupt-controller; 110*40dc2270SThierry Reding }; 111