1*f882846cSLubomir Rintel# SPDX-License-Identifier: GPL-2.0-only 2*f882846cSLubomir Rintel%YAML 1.2 3*f882846cSLubomir Rintel--- 4*f882846cSLubomir Rintel$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# 5*f882846cSLubomir Rintel$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f882846cSLubomir Rintel 7*f882846cSLubomir Rinteltitle: Marvell PXA GPIO controller 8*f882846cSLubomir Rintel 9*f882846cSLubomir Rintelmaintainers: 10*f882846cSLubomir Rintel - Linus Walleij <linus.walleij@linaro.org> 11*f882846cSLubomir Rintel - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12*f882846cSLubomir Rintel - Rob Herring <robh+dt@kernel.org> 13*f882846cSLubomir Rintel 14*f882846cSLubomir RintelallOf: 15*f882846cSLubomir Rintel - if: 16*f882846cSLubomir Rintel properties: 17*f882846cSLubomir Rintel compatible: 18*f882846cSLubomir Rintel contains: 19*f882846cSLubomir Rintel enum: 20*f882846cSLubomir Rintel - intel,pxa25x-gpio 21*f882846cSLubomir Rintel - intel,pxa26x-gpio 22*f882846cSLubomir Rintel - intel,pxa27x-gpio 23*f882846cSLubomir Rintel - intel,pxa3xx-gpio 24*f882846cSLubomir Rintel then: 25*f882846cSLubomir Rintel properties: 26*f882846cSLubomir Rintel interrupts: 27*f882846cSLubomir Rintel minItems: 3 28*f882846cSLubomir Rintel maxItems: 3 29*f882846cSLubomir Rintel interrupt-names: 30*f882846cSLubomir Rintel items: 31*f882846cSLubomir Rintel - const: gpio0 32*f882846cSLubomir Rintel - const: gpio1 33*f882846cSLubomir Rintel - const: gpio_mux 34*f882846cSLubomir Rintel - if: 35*f882846cSLubomir Rintel properties: 36*f882846cSLubomir Rintel compatible: 37*f882846cSLubomir Rintel contains: 38*f882846cSLubomir Rintel enum: 39*f882846cSLubomir Rintel - marvell,mmp-gpio 40*f882846cSLubomir Rintel - marvell,mmp2-gpio 41*f882846cSLubomir Rintel then: 42*f882846cSLubomir Rintel properties: 43*f882846cSLubomir Rintel interrupts: 44*f882846cSLubomir Rintel maxItems: 1 45*f882846cSLubomir Rintel interrupt-names: 46*f882846cSLubomir Rintel items: 47*f882846cSLubomir Rintel - const: gpio_mux 48*f882846cSLubomir Rintel 49*f882846cSLubomir Rintelproperties: 50*f882846cSLubomir Rintel $nodename: 51*f882846cSLubomir Rintel pattern: '^gpio@[0-9a-f]+$' 52*f882846cSLubomir Rintel 53*f882846cSLubomir Rintel compatible: 54*f882846cSLubomir Rintel enum: 55*f882846cSLubomir Rintel - intel,pxa25x-gpio 56*f882846cSLubomir Rintel - intel,pxa26x-gpio 57*f882846cSLubomir Rintel - intel,pxa27x-gpio 58*f882846cSLubomir Rintel - intel,pxa3xx-gpio 59*f882846cSLubomir Rintel - marvell,mmp-gpio 60*f882846cSLubomir Rintel - marvell,mmp2-gpio 61*f882846cSLubomir Rintel - marvell,pxa93x-gpio 62*f882846cSLubomir Rintel 63*f882846cSLubomir Rintel reg: 64*f882846cSLubomir Rintel maxItems: 1 65*f882846cSLubomir Rintel 66*f882846cSLubomir Rintel clocks: 67*f882846cSLubomir Rintel maxItems: 1 68*f882846cSLubomir Rintel 69*f882846cSLubomir Rintel resets: 70*f882846cSLubomir Rintel maxItems: 1 71*f882846cSLubomir Rintel 72*f882846cSLubomir Rintel ranges: true 73*f882846cSLubomir Rintel 74*f882846cSLubomir Rintel '#address-cells': 75*f882846cSLubomir Rintel const: 1 76*f882846cSLubomir Rintel 77*f882846cSLubomir Rintel '#size-cells': 78*f882846cSLubomir Rintel const: 1 79*f882846cSLubomir Rintel 80*f882846cSLubomir Rintel gpio-controller: true 81*f882846cSLubomir Rintel 82*f882846cSLubomir Rintel '#gpio-cells': 83*f882846cSLubomir Rintel const: 2 84*f882846cSLubomir Rintel 85*f882846cSLubomir Rintel gpio-ranges: 86*f882846cSLubomir Rintel maxItems: 1 87*f882846cSLubomir Rintel 88*f882846cSLubomir Rintel interrupts: true 89*f882846cSLubomir Rintel 90*f882846cSLubomir Rintel interrupt-names: true 91*f882846cSLubomir Rintel 92*f882846cSLubomir Rintel interrupt-controller: true 93*f882846cSLubomir Rintel 94*f882846cSLubomir Rintel '#interrupt-cells': 95*f882846cSLubomir Rintel const: 2 96*f882846cSLubomir Rintel 97*f882846cSLubomir RintelpatternProperties: 98*f882846cSLubomir Rintel '^gpio@[0-9a-f]*$': 99*f882846cSLubomir Rintel type: object 100*f882846cSLubomir Rintel properties: 101*f882846cSLubomir Rintel reg: 102*f882846cSLubomir Rintel maxItems: 1 103*f882846cSLubomir Rintel 104*f882846cSLubomir Rintel required: 105*f882846cSLubomir Rintel - reg 106*f882846cSLubomir Rintel 107*f882846cSLubomir Rintel additionalProperties: false 108*f882846cSLubomir Rintel 109*f882846cSLubomir Rintelrequired: 110*f882846cSLubomir Rintel - compatible 111*f882846cSLubomir Rintel - '#address-cells' 112*f882846cSLubomir Rintel - '#size-cells' 113*f882846cSLubomir Rintel - reg 114*f882846cSLubomir Rintel - gpio-controller 115*f882846cSLubomir Rintel - '#gpio-cells' 116*f882846cSLubomir Rintel - interrupts 117*f882846cSLubomir Rintel - interrupt-names 118*f882846cSLubomir Rintel - interrupt-controller 119*f882846cSLubomir Rintel - '#interrupt-cells' 120*f882846cSLubomir Rintel 121*f882846cSLubomir RinteladditionalProperties: false 122*f882846cSLubomir Rintel 123*f882846cSLubomir Rintelexamples: 124*f882846cSLubomir Rintel - | 125*f882846cSLubomir Rintel #include <dt-bindings/clock/pxa-clock.h> 126*f882846cSLubomir Rintel gpio@40e00000 { 127*f882846cSLubomir Rintel compatible = "intel,pxa3xx-gpio"; 128*f882846cSLubomir Rintel #address-cells = <1>; 129*f882846cSLubomir Rintel #size-cells = <1>; 130*f882846cSLubomir Rintel reg = <0x40e00000 0x10000>; 131*f882846cSLubomir Rintel gpio-controller; 132*f882846cSLubomir Rintel #gpio-cells = <2>; 133*f882846cSLubomir Rintel interrupts = <8>, <9>, <10>; 134*f882846cSLubomir Rintel interrupt-names = "gpio0", "gpio1", "gpio_mux"; 135*f882846cSLubomir Rintel clocks = <&clks CLK_GPIO>; 136*f882846cSLubomir Rintel interrupt-controller; 137*f882846cSLubomir Rintel #interrupt-cells = <2>; 138*f882846cSLubomir Rintel }; 139*f882846cSLubomir Rintel - | 140*f882846cSLubomir Rintel #include <dt-bindings/clock/marvell,pxa910.h> 141*f882846cSLubomir Rintel gpio@d4019000 { 142*f882846cSLubomir Rintel compatible = "marvell,mmp-gpio"; 143*f882846cSLubomir Rintel #address-cells = <1>; 144*f882846cSLubomir Rintel #size-cells = <1>; 145*f882846cSLubomir Rintel reg = <0xd4019000 0x1000>; 146*f882846cSLubomir Rintel gpio-controller; 147*f882846cSLubomir Rintel #gpio-cells = <2>; 148*f882846cSLubomir Rintel interrupts = <49>; 149*f882846cSLubomir Rintel interrupt-names = "gpio_mux"; 150*f882846cSLubomir Rintel clocks = <&soc_clocks PXA910_CLK_GPIO>; 151*f882846cSLubomir Rintel resets = <&soc_clocks PXA910_CLK_GPIO>; 152*f882846cSLubomir Rintel interrupt-controller; 153*f882846cSLubomir Rintel #interrupt-cells = <2>; 154*f882846cSLubomir Rintel ranges; 155*f882846cSLubomir Rintel 156*f882846cSLubomir Rintel gpio@d4019000 { 157*f882846cSLubomir Rintel reg = <0xd4019000 0x4>; 158*f882846cSLubomir Rintel }; 159*f882846cSLubomir Rintel 160*f882846cSLubomir Rintel gpio@d4019004 { 161*f882846cSLubomir Rintel reg = <0xd4019004 0x4>; 162*f882846cSLubomir Rintel }; 163*f882846cSLubomir Rintel 164*f882846cSLubomir Rintel gpio@d4019008 { 165*f882846cSLubomir Rintel reg = <0xd4019008 0x4>; 166*f882846cSLubomir Rintel }; 167*f882846cSLubomir Rintel 168*f882846cSLubomir Rintel gpio@d4019100 { 169*f882846cSLubomir Rintel reg = <0xd4019100 0x4>; 170*f882846cSLubomir Rintel }; 171*f882846cSLubomir Rintel }; 172*f882846cSLubomir Rintel 173*f882846cSLubomir Rintel... 174