1*71b66001SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*71b66001SRob Herring (Arm)%YAML 1.2 3*71b66001SRob Herring (Arm)--- 4*71b66001SRob Herring (Arm)$id: http://devicetree.org/schemas/lantiq,gpio-mm-lantiq.yaml# 5*71b66001SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*71b66001SRob Herring (Arm) 7*71b66001SRob Herring (Arm)title: Lantiq SoC External Bus memory mapped GPIO controller 8*71b66001SRob Herring (Arm) 9*71b66001SRob Herring (Arm)maintainers: 10*71b66001SRob Herring (Arm) - John Crispin <john@phrozen.org> 11*71b66001SRob Herring (Arm) 12*71b66001SRob Herring (Arm)description: | 13*71b66001SRob Herring (Arm) By attaching hardware latches to the EBU it is possible to create output 14*71b66001SRob Herring (Arm) only gpios. This driver configures a special memory address, which when 15*71b66001SRob Herring (Arm) written to outputs 16 bit to the latches. 16*71b66001SRob Herring (Arm) 17*71b66001SRob Herring (Arm) The node describing the memory mapped GPIOs needs to be a child of the node 18*71b66001SRob Herring (Arm) describing the "lantiq,localbus". 19*71b66001SRob Herring (Arm) 20*71b66001SRob Herring (Arm)properties: 21*71b66001SRob Herring (Arm) compatible: 22*71b66001SRob Herring (Arm) enum: 23*71b66001SRob Herring (Arm) - lantiq,gpio-mm-lantiq 24*71b66001SRob Herring (Arm) - lantiq,gpio-mm 25*71b66001SRob Herring (Arm) 26*71b66001SRob Herring (Arm) reg: 27*71b66001SRob Herring (Arm) maxItems: 1 28*71b66001SRob Herring (Arm) 29*71b66001SRob Herring (Arm) '#gpio-cells': 30*71b66001SRob Herring (Arm) const: 2 31*71b66001SRob Herring (Arm) 32*71b66001SRob Herring (Arm) gpio-controller: true 33*71b66001SRob Herring (Arm) 34*71b66001SRob Herring (Arm) lantiq,shadow: 35*71b66001SRob Herring (Arm) description: The default value that we shall assume as already set on the shift register cascade. 36*71b66001SRob Herring (Arm) $ref: /schemas/types.yaml#/definitions/uint32 37*71b66001SRob Herring (Arm) 38*71b66001SRob Herring (Arm)required: 39*71b66001SRob Herring (Arm) - compatible 40*71b66001SRob Herring (Arm) - reg 41*71b66001SRob Herring (Arm) - '#gpio-cells' 42*71b66001SRob Herring (Arm) - gpio-controller 43*71b66001SRob Herring (Arm) 44*71b66001SRob Herring (Arm)additionalProperties: false 45*71b66001SRob Herring (Arm) 46*71b66001SRob Herring (Arm)examples: 47*71b66001SRob Herring (Arm) - | 48*71b66001SRob Herring (Arm) gpio@4000000 { 49*71b66001SRob Herring (Arm) compatible = "lantiq,gpio-mm-lantiq"; 50*71b66001SRob Herring (Arm) reg = <0x4000000 0x10>; 51*71b66001SRob Herring (Arm) gpio-controller; 52*71b66001SRob Herring (Arm) #gpio-cells = <2>; 53*71b66001SRob Herring (Arm) lantiq,shadow = <0x77f>; 54*71b66001SRob Herring (Arm) }; 55