1*1b5bda21SFeng KanAPM X-Gene SoC GPIO controller bindings 2*1b5bda21SFeng Kan 3*1b5bda21SFeng KanThis is a gpio controller that is part of the flash controller. 4*1b5bda21SFeng KanThis gpio controller controls a total of 48 gpios. 5*1b5bda21SFeng Kan 6*1b5bda21SFeng KanRequired properties: 7*1b5bda21SFeng Kan- compatible: "apm,xgene-gpio" for X-Gene GPIO controller 8*1b5bda21SFeng Kan- reg: Physical base address and size of the controller's registers 9*1b5bda21SFeng Kan- #gpio-cells: Should be two. 10*1b5bda21SFeng Kan - first cell is the pin number 11*1b5bda21SFeng Kan - second cell is used to specify the gpio polarity: 12*1b5bda21SFeng Kan 0 = active high 13*1b5bda21SFeng Kan 1 = active low 14*1b5bda21SFeng Kan- gpio-controller: Marks the device node as a GPIO controller. 15*1b5bda21SFeng Kan 16*1b5bda21SFeng KanExample: 17*1b5bda21SFeng Kan gpio0: gpio0@1701c000 { 18*1b5bda21SFeng Kan compatible = "apm,xgene-gpio"; 19*1b5bda21SFeng Kan reg = <0x0 0x1701c000 0x0 0x40>; 20*1b5bda21SFeng Kan gpio-controller; 21*1b5bda21SFeng Kan #gpio-cells = <2>; 22*1b5bda21SFeng Kan }; 23