17a839e9aSY VoAPM X-Gene Standby GPIO controller bindings 27a839e9aSY Vo 38cae5f97SQuan NguyenThis is a gpio controller in the standby domain. It also supports interrupt in 48cae5f97SQuan Nguyensome particular pins which are sourced to its parent interrupt controller 58cae5f97SQuan Nguyenas diagram below: 68cae5f97SQuan Nguyen +-----------------+ 78cae5f97SQuan Nguyen | X-Gene standby | 88cae5f97SQuan Nguyen | GPIO controller +------ GPIO_0 98cae5f97SQuan Nguyen+------------+ | | ... 108cae5f97SQuan Nguyen| Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0 118cae5f97SQuan Nguyen| controller | (SPI40) | | ... 128cae5f97SQuan Nguyen| (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N 138cae5f97SQuan Nguyen| | ... | | 148cae5f97SQuan Nguyen| | EXT_INT_N | +------ GPIO_[N+9] 158cae5f97SQuan Nguyen| | (SPI[40 + N])| | ... 168cae5f97SQuan Nguyen| +--------------+ +------ GPIO_MAX 178cae5f97SQuan Nguyen+------------+ +-----------------+ 187a839e9aSY Vo 197a839e9aSY VoRequired properties: 207a839e9aSY Vo- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller 217a839e9aSY Vo- reg: Physical base address and size of the controller's registers 227a839e9aSY Vo- #gpio-cells: Should be two. 237a839e9aSY Vo - first cell is the pin number 247a839e9aSY Vo - second cell is used to specify the gpio polarity: 257a839e9aSY Vo 0 = active high 267a839e9aSY Vo 1 = active low 277a839e9aSY Vo- gpio-controller: Marks the device node as a GPIO controller. 288cae5f97SQuan Nguyen- interrupts: The EXT_INT_0 parent interrupt resource must be listed first. 298cae5f97SQuan Nguyen- interrupt-cells: Should be two. 30*47aab533SBjorn Helgaas - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N. 318cae5f97SQuan Nguyen - second cell is used to specify flags. 328cae5f97SQuan Nguyen- interrupt-controller: Marks the device node as an interrupt controller. 338cae5f97SQuan Nguyen- apm,nr-gpios: Optional, specify number of gpios pin. 348cae5f97SQuan Nguyen- apm,nr-irqs: Optional, specify number of interrupt pins. 358cae5f97SQuan Nguyen- apm,irq-start: Optional, specify lowest gpio pin support interrupt. 367a839e9aSY Vo 377a839e9aSY VoExample: 388cae5f97SQuan Nguyen sbgpio: gpio@17001000{ 397a839e9aSY Vo compatible = "apm,xgene-gpio-sb"; 407a839e9aSY Vo reg = <0x0 0x17001000 0x0 0x400>; 417a839e9aSY Vo #gpio-cells = <2>; 427a839e9aSY Vo gpio-controller; 437a839e9aSY Vo interrupts = <0x0 0x28 0x1>, 447a839e9aSY Vo <0x0 0x29 0x1>, 457a839e9aSY Vo <0x0 0x2a 0x1>, 467a839e9aSY Vo <0x0 0x2b 0x1>, 477a839e9aSY Vo <0x0 0x2c 0x1>, 487a839e9aSY Vo <0x0 0x2d 0x1>; 498cae5f97SQuan Nguyen interrupt-parent = <&gic>; 508cae5f97SQuan Nguyen #interrupt-cells = <2>; 518cae5f97SQuan Nguyen interrupt-controller; 528cae5f97SQuan Nguyen apm,nr-gpios = <22>; 538cae5f97SQuan Nguyen apm,nr-irqs = <6>; 548cae5f97SQuan Nguyen apm,irq-start = <8>; 558cae5f97SQuan Nguyen }; 568cae5f97SQuan Nguyen 578cae5f97SQuan Nguyen testuser { 588cae5f97SQuan Nguyen compatible = "example,testuser"; 598cae5f97SQuan Nguyen /* Use the GPIO_13/EXT_INT_5 line as an active high triggered 608cae5f97SQuan Nguyen * level interrupt 618cae5f97SQuan Nguyen */ 628cae5f97SQuan Nguyen interrupts = <5 4>; 638cae5f97SQuan Nguyen interrupt-parent = <&sbgpio>; 647a839e9aSY Vo }; 65