xref: /linux/Documentation/devicetree/bindings/gpio/gpio-latch.yaml (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1*2a903ca9SSascha Hauer# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*2a903ca9SSascha Hauer%YAML 1.2
3*2a903ca9SSascha Hauer---
4*2a903ca9SSascha Hauer$id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
5*2a903ca9SSascha Hauer$schema: http://devicetree.org/meta-schemas/core.yaml#
6*2a903ca9SSascha Hauer
7*2a903ca9SSascha Hauertitle: GPIO latch controller
8*2a903ca9SSascha Hauer
9*2a903ca9SSascha Hauermaintainers:
10*2a903ca9SSascha Hauer  - Sascha Hauer <s.hauer@pengutronix.de>
11*2a903ca9SSascha Hauer
12*2a903ca9SSascha Hauerdescription: |
13*2a903ca9SSascha Hauer  This binding describes a GPIO multiplexer based on latches connected to
14*2a903ca9SSascha Hauer  other GPIOs, like this:
15*2a903ca9SSascha Hauer
16*2a903ca9SSascha Hauer  CLK0 ----------------------.        ,--------.
17*2a903ca9SSascha Hauer  CLK1 -------------------.  `--------|>    #0 |
18*2a903ca9SSascha Hauer                          |           |        |
19*2a903ca9SSascha Hauer  OUT0 ----------------+--|-----------|D0    Q0|-----|<
20*2a903ca9SSascha Hauer  OUT1 --------------+-|--|-----------|D1    Q1|-----|<
21*2a903ca9SSascha Hauer  OUT2 ------------+-|-|--|-----------|D2    Q2|-----|<
22*2a903ca9SSascha Hauer  OUT3 ----------+-|-|-|--|-----------|D3    Q3|-----|<
23*2a903ca9SSascha Hauer  OUT4 --------+-|-|-|-|--|-----------|D4    Q4|-----|<
24*2a903ca9SSascha Hauer  OUT5 ------+-|-|-|-|-|--|-----------|D5    Q5|-----|<
25*2a903ca9SSascha Hauer  OUT6 ----+-|-|-|-|-|-|--|-----------|D6    Q6|-----|<
26*2a903ca9SSascha Hauer  OUT7 --+-|-|-|-|-|-|-|--|-----------|D7    Q7|-----|<
27*2a903ca9SSascha Hauer         | | | | | | | |  |           `--------'
28*2a903ca9SSascha Hauer         | | | | | | | |  |
29*2a903ca9SSascha Hauer         | | | | | | | |  |           ,--------.
30*2a903ca9SSascha Hauer         | | | | | | | |  `-----------|>    #1 |
31*2a903ca9SSascha Hauer         | | | | | | | |              |        |
32*2a903ca9SSascha Hauer         | | | | | | | `--------------|D0    Q0|-----|<
33*2a903ca9SSascha Hauer         | | | | | | `----------------|D1    Q1|-----|<
34*2a903ca9SSascha Hauer         | | | | | `------------------|D2    Q2|-----|<
35*2a903ca9SSascha Hauer         | | | | `--------------------|D3    Q3|-----|<
36*2a903ca9SSascha Hauer         | | | `----------------------|D4    Q4|-----|<
37*2a903ca9SSascha Hauer         | | `------------------------|D5    Q5|-----|<
38*2a903ca9SSascha Hauer         | `--------------------------|D6    Q6|-----|<
39*2a903ca9SSascha Hauer         `----------------------------|D7    Q7|-----|<
40*2a903ca9SSascha Hauer                                      `--------'
41*2a903ca9SSascha Hauer
42*2a903ca9SSascha Hauer  The number of clk-gpios and latched-gpios is not fixed. The actual number
43*2a903ca9SSascha Hauer  of number of latches and the number of inputs per latch is derived from
44*2a903ca9SSascha Hauer  the number of GPIOs given in the corresponding device tree properties.
45*2a903ca9SSascha Hauer
46*2a903ca9SSascha Hauerproperties:
47*2a903ca9SSascha Hauer  compatible:
48*2a903ca9SSascha Hauer    const: gpio-latch
49*2a903ca9SSascha Hauer  "#gpio-cells":
50*2a903ca9SSascha Hauer    const: 2
51*2a903ca9SSascha Hauer
52*2a903ca9SSascha Hauer  clk-gpios:
53*2a903ca9SSascha Hauer    description: Array of GPIOs to be used to clock a latch
54*2a903ca9SSascha Hauer
55*2a903ca9SSascha Hauer  latched-gpios:
56*2a903ca9SSascha Hauer    description: Array of GPIOs to be used as inputs per latch
57*2a903ca9SSascha Hauer
58*2a903ca9SSascha Hauer  setup-duration-ns:
59*2a903ca9SSascha Hauer    description: Delay in nanoseconds to wait after the latch inputs have been
60*2a903ca9SSascha Hauer      set up
61*2a903ca9SSascha Hauer
62*2a903ca9SSascha Hauer  clock-duration-ns:
63*2a903ca9SSascha Hauer    description: Delay in nanoseconds to wait between clock output changes
64*2a903ca9SSascha Hauer
65*2a903ca9SSascha Hauer  gpio-controller: true
66*2a903ca9SSascha Hauer
67*2a903ca9SSascha Hauer  gpio-line-names: true
68*2a903ca9SSascha Hauer
69*2a903ca9SSascha Hauerrequired:
70*2a903ca9SSascha Hauer  - compatible
71*2a903ca9SSascha Hauer  - "#gpio-cells"
72*2a903ca9SSascha Hauer  - gpio-controller
73*2a903ca9SSascha Hauer  - clk-gpios
74*2a903ca9SSascha Hauer  - latched-gpios
75*2a903ca9SSascha Hauer
76*2a903ca9SSascha HaueradditionalProperties: false
77*2a903ca9SSascha Hauer
78*2a903ca9SSascha Hauerexamples:
79*2a903ca9SSascha Hauer  - |
80*2a903ca9SSascha Hauer    gpio-latch {
81*2a903ca9SSascha Hauer        #gpio-cells = <2>;
82*2a903ca9SSascha Hauer        pinctrl-names = "default";
83*2a903ca9SSascha Hauer        pinctrl-0 = <&pinctrl_di_do_leds>;
84*2a903ca9SSascha Hauer        compatible = "gpio-latch";
85*2a903ca9SSascha Hauer        gpio-controller;
86*2a903ca9SSascha Hauer        setup-duration-ns = <100>;
87*2a903ca9SSascha Hauer        clock-duration-ns = <100>;
88*2a903ca9SSascha Hauer
89*2a903ca9SSascha Hauer        clk-gpios = <&gpio3 7 0>, <&gpio3 8 0>;
90*2a903ca9SSascha Hauer        latched-gpios = <&gpio3 21 0>, <&gpio3 22 0>,
91*2a903ca9SSascha Hauer                       <&gpio3 23 0>, <&gpio3 24 0>,
92*2a903ca9SSascha Hauer                       <&gpio3 25 0>, <&gpio3 26 0>,
93*2a903ca9SSascha Hauer                       <&gpio3 27 0>, <&gpio3 28 0>;
94*2a903ca9SSascha Hauer    };
95