1*56b01accSGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*56b01accSGeert Uytterhoeven%YAML 1.2 3*56b01accSGeert Uytterhoeven--- 4*56b01accSGeert Uytterhoeven$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml# 5*56b01accSGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml# 6*56b01accSGeert Uytterhoeven 7*56b01accSGeert Uytterhoeventitle: Generic 8-bit shift register 8*56b01accSGeert Uytterhoeven 9*56b01accSGeert Uytterhoevenmaintainers: 10*56b01accSGeert Uytterhoeven - Maxime Ripard <mripard@kernel.org> 11*56b01accSGeert Uytterhoeven 12*56b01accSGeert Uytterhoevenproperties: 13*56b01accSGeert Uytterhoeven compatible: 14*56b01accSGeert Uytterhoeven enum: 15*56b01accSGeert Uytterhoeven - fairchild,74hc595 16*56b01accSGeert Uytterhoeven - nxp,74lvc594 17*56b01accSGeert Uytterhoeven 18*56b01accSGeert Uytterhoeven reg: 19*56b01accSGeert Uytterhoeven maxItems: 1 20*56b01accSGeert Uytterhoeven 21*56b01accSGeert Uytterhoeven gpio-controller: true 22*56b01accSGeert Uytterhoeven 23*56b01accSGeert Uytterhoeven '#gpio-cells': 24*56b01accSGeert Uytterhoeven description: 25*56b01accSGeert Uytterhoeven The second cell is only used to specify the GPIO polarity. 26*56b01accSGeert Uytterhoeven const: 2 27*56b01accSGeert Uytterhoeven 28*56b01accSGeert Uytterhoeven registers-number: 29*56b01accSGeert Uytterhoeven description: Number of daisy-chained shift registers 30*56b01accSGeert Uytterhoeven 31*56b01accSGeert Uytterhoeven enable-gpios: 32*56b01accSGeert Uytterhoeven description: GPIO connected to the OE (Output Enable) pin. 33*56b01accSGeert Uytterhoeven maxItems: 1 34*56b01accSGeert Uytterhoeven 35*56b01accSGeert Uytterhoeven spi-max-frequency: true 36*56b01accSGeert Uytterhoeven 37*56b01accSGeert UytterhoevenpatternProperties: 38*56b01accSGeert Uytterhoeven "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": 39*56b01accSGeert Uytterhoeven type: object 40*56b01accSGeert Uytterhoeven 41*56b01accSGeert Uytterhoeven properties: 42*56b01accSGeert Uytterhoeven gpio-hog: true 43*56b01accSGeert Uytterhoeven gpios: true 44*56b01accSGeert Uytterhoeven output-high: true 45*56b01accSGeert Uytterhoeven output-low: true 46*56b01accSGeert Uytterhoeven line-name: true 47*56b01accSGeert Uytterhoeven 48*56b01accSGeert Uytterhoeven required: 49*56b01accSGeert Uytterhoeven - gpio-hog 50*56b01accSGeert Uytterhoeven - gpios 51*56b01accSGeert Uytterhoeven 52*56b01accSGeert Uytterhoeven additionalProperties: false 53*56b01accSGeert Uytterhoeven 54*56b01accSGeert Uytterhoevenrequired: 55*56b01accSGeert Uytterhoeven - compatible 56*56b01accSGeert Uytterhoeven - reg 57*56b01accSGeert Uytterhoeven - gpio-controller 58*56b01accSGeert Uytterhoeven - '#gpio-cells' 59*56b01accSGeert Uytterhoeven - registers-number 60*56b01accSGeert Uytterhoeven 61*56b01accSGeert UytterhoevenadditionalProperties: false 62*56b01accSGeert Uytterhoeven 63*56b01accSGeert Uytterhoevenexamples: 64*56b01accSGeert Uytterhoeven - | 65*56b01accSGeert Uytterhoeven spi { 66*56b01accSGeert Uytterhoeven #address-cells = <1>; 67*56b01accSGeert Uytterhoeven #size-cells = <0>; 68*56b01accSGeert Uytterhoeven 69*56b01accSGeert Uytterhoeven gpio5: gpio5@0 { 70*56b01accSGeert Uytterhoeven compatible = "fairchild,74hc595"; 71*56b01accSGeert Uytterhoeven reg = <0>; 72*56b01accSGeert Uytterhoeven gpio-controller; 73*56b01accSGeert Uytterhoeven #gpio-cells = <2>; 74*56b01accSGeert Uytterhoeven registers-number = <4>; 75*56b01accSGeert Uytterhoeven spi-max-frequency = <100000>; 76*56b01accSGeert Uytterhoeven }; 77*56b01accSGeert Uytterhoeven }; 78