1*36f42234SHarshit Shah# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*36f42234SHarshit Shah%YAML 1.2 3*36f42234SHarshit Shah--- 4*36f42234SHarshit Shah$id: http://devicetree.org/schemas/gpio/cdns,gpio.yaml# 5*36f42234SHarshit Shah$schema: http://devicetree.org/meta-schemas/core.yaml# 6*36f42234SHarshit Shah 7*36f42234SHarshit Shahtitle: Cadence GPIO Controller 8*36f42234SHarshit Shah 9*36f42234SHarshit Shahmaintainers: 10*36f42234SHarshit Shah - Jan Kotas <jank@cadence.com> 11*36f42234SHarshit Shah 12*36f42234SHarshit Shahproperties: 13*36f42234SHarshit Shah compatible: 14*36f42234SHarshit Shah const: cdns,gpio-r1p02 15*36f42234SHarshit Shah 16*36f42234SHarshit Shah reg: 17*36f42234SHarshit Shah maxItems: 1 18*36f42234SHarshit Shah 19*36f42234SHarshit Shah clocks: 20*36f42234SHarshit Shah maxItems: 1 21*36f42234SHarshit Shah 22*36f42234SHarshit Shah ngpios: 23*36f42234SHarshit Shah minimum: 1 24*36f42234SHarshit Shah maximum: 32 25*36f42234SHarshit Shah 26*36f42234SHarshit Shah gpio-controller: true 27*36f42234SHarshit Shah 28*36f42234SHarshit Shah "#gpio-cells": 29*36f42234SHarshit Shah const: 2 30*36f42234SHarshit Shah description: | 31*36f42234SHarshit Shah - First cell is the GPIO line number. 32*36f42234SHarshit Shah - Second cell is flags as defined in <dt-bindings/gpio/gpio.h>, 33*36f42234SHarshit Shah only GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW supported. 34*36f42234SHarshit Shah 35*36f42234SHarshit Shah interrupt-controller: true 36*36f42234SHarshit Shah 37*36f42234SHarshit Shah "#interrupt-cells": 38*36f42234SHarshit Shah const: 2 39*36f42234SHarshit Shah description: | 40*36f42234SHarshit Shah - First cell is the GPIO line number used as IRQ. 41*36f42234SHarshit Shah - Second cell is the trigger type, as defined in 42*36f42234SHarshit Shah <dt-bindings/interrupt-controller/irq.h>. 43*36f42234SHarshit Shah 44*36f42234SHarshit Shah interrupts: 45*36f42234SHarshit Shah maxItems: 1 46*36f42234SHarshit Shah 47*36f42234SHarshit Shahrequired: 48*36f42234SHarshit Shah - compatible 49*36f42234SHarshit Shah - reg 50*36f42234SHarshit Shah - clocks 51*36f42234SHarshit Shah - gpio-controller 52*36f42234SHarshit Shah - "#gpio-cells" 53*36f42234SHarshit Shah 54*36f42234SHarshit Shahif: 55*36f42234SHarshit Shah required: [interrupt-controller] 56*36f42234SHarshit Shahthen: 57*36f42234SHarshit Shah required: 58*36f42234SHarshit Shah - interrupts 59*36f42234SHarshit Shah 60*36f42234SHarshit ShahadditionalProperties: false 61*36f42234SHarshit Shah 62*36f42234SHarshit Shahexamples: 63*36f42234SHarshit Shah - | 64*36f42234SHarshit Shah #include <dt-bindings/interrupt-controller/arm-gic.h> 65*36f42234SHarshit Shah #include <dt-bindings/interrupt-controller/irq.h> 66*36f42234SHarshit Shah gpio0: gpio-controller@fd060000 { 67*36f42234SHarshit Shah compatible = "cdns,gpio-r1p02"; 68*36f42234SHarshit Shah reg = <0xfd060000 0x1000>; 69*36f42234SHarshit Shah clocks = <&gpio_clk>; 70*36f42234SHarshit Shah 71*36f42234SHarshit Shah interrupt-parent = <&gic>; 72*36f42234SHarshit Shah interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 73*36f42234SHarshit Shah 74*36f42234SHarshit Shah gpio-controller; 75*36f42234SHarshit Shah #gpio-cells = <2>; 76*36f42234SHarshit Shah 77*36f42234SHarshit Shah interrupt-controller; 78*36f42234SHarshit Shah #interrupt-cells = <2>; 79*36f42234SHarshit Shah }; 80