xref: /linux/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml (revision be1ca3ee8f97067fee87fda73ea5959d5ab75bbf) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Aspeed SGPIO controller
8
9maintainers:
10  - Andrew Jeffery <andrew@aj.id.au>
11
12description:
13  This SGPIO controller is for ASPEED AST2400, AST2500, AST2600 and AST2700 SoC,
14  AST2700 have two sgpio master both with 256 pins,
15  AST2600 have two sgpio master one with 128 pins another one with 80 pins,
16  AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
17  GPIO pins can be programmed to support the following options
18  - Support interrupt option for each input port and various interrupt
19    sensitivity option (level-high, level-low, edge-high, edge-low)
20  - Support reset tolerance option for each output port
21  - Directly connected to APB bus and its shift clock is from APB bus clock
22    divided by a programmable value.
23  - Co-work with external signal-chained TTL components (74LV165/74LV595)
24
25properties:
26  compatible:
27    enum:
28      - aspeed,ast2400-sgpio
29      - aspeed,ast2500-sgpio
30      - aspeed,ast2600-sgpiom
31      - aspeed,ast2700-sgpiom
32
33  reg:
34    maxItems: 1
35
36  gpio-controller: true
37
38  # Each SGPIO is represented as a pair of input and output GPIOs
39  gpio-line-names:
40    minItems: 160
41    maxItems: 256
42
43  '#gpio-cells':
44    const: 2
45
46  interrupts:
47    maxItems: 1
48
49  interrupt-controller: true
50
51  '#interrupt-cells':
52    const: 2
53
54  clocks:
55    maxItems: 1
56
57  ngpios: true
58
59  bus-frequency: true
60
61required:
62  - compatible
63  - reg
64  - gpio-controller
65  - '#gpio-cells'
66  - interrupts
67  - interrupt-controller
68  - '#interrupt-cells'
69  - ngpios
70  - clocks
71  - bus-frequency
72
73additionalProperties: false
74
75examples:
76  - |
77    #include <dt-bindings/clock/aspeed-clock.h>
78    sgpio: sgpio@1e780200 {
79        #gpio-cells = <2>;
80        compatible = "aspeed,ast2500-sgpio";
81        gpio-controller;
82        interrupts = <40>;
83        reg = <0x1e780200 0x0100>;
84        clocks = <&syscon ASPEED_CLK_APB>;
85        interrupt-controller;
86        #interrupt-cells = <2>;
87        ngpios = <80>;
88        bus-frequency = <12000000>;
89    };
90