xref: /linux/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
185aef2b2SSteven Lee# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
285aef2b2SSteven Lee%YAML 1.2
385aef2b2SSteven Lee---
485aef2b2SSteven Lee$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
585aef2b2SSteven Lee$schema: http://devicetree.org/meta-schemas/core.yaml#
685aef2b2SSteven Lee
785aef2b2SSteven Leetitle: Aspeed SGPIO controller
885aef2b2SSteven Lee
985aef2b2SSteven Leemaintainers:
1085aef2b2SSteven Lee  - Andrew Jeffery <andrew@aj.id.au>
1185aef2b2SSteven Lee
1285aef2b2SSteven Leedescription:
130ffbfcbcSSteven Lee  This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
140ffbfcbcSSteven Lee  AST2600 have two sgpio master one with 128 pins another one with 80 pins,
150ffbfcbcSSteven Lee  AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
160ffbfcbcSSteven Lee  GPIO pins can be programmed to support the following options
1785aef2b2SSteven Lee  - Support interrupt option for each input port and various interrupt
1885aef2b2SSteven Lee    sensitivity option (level-high, level-low, edge-high, edge-low)
1985aef2b2SSteven Lee  - Support reset tolerance option for each output port
2085aef2b2SSteven Lee  - Directly connected to APB bus and its shift clock is from APB bus clock
2185aef2b2SSteven Lee    divided by a programmable value.
2285aef2b2SSteven Lee  - Co-work with external signal-chained TTL components (74LV165/74LV595)
2385aef2b2SSteven Lee
2485aef2b2SSteven Leeproperties:
2585aef2b2SSteven Lee  compatible:
2685aef2b2SSteven Lee    enum:
2785aef2b2SSteven Lee      - aspeed,ast2400-sgpio
2885aef2b2SSteven Lee      - aspeed,ast2500-sgpio
290ffbfcbcSSteven Lee      - aspeed,ast2600-sgpiom
3085aef2b2SSteven Lee
3185aef2b2SSteven Lee  reg:
3285aef2b2SSteven Lee    maxItems: 1
3385aef2b2SSteven Lee
3485aef2b2SSteven Lee  gpio-controller: true
3585aef2b2SSteven Lee
36a31517b1SAndrew Jeffery  # Each SGPIO is represented as a pair of input and output GPIOs
37a31517b1SAndrew Jeffery  gpio-line-names:
38a31517b1SAndrew Jeffery    minItems: 160
39a31517b1SAndrew Jeffery    maxItems: 256
40a31517b1SAndrew Jeffery
4185aef2b2SSteven Lee  '#gpio-cells':
4285aef2b2SSteven Lee    const: 2
4385aef2b2SSteven Lee
4485aef2b2SSteven Lee  interrupts:
4585aef2b2SSteven Lee    maxItems: 1
4685aef2b2SSteven Lee
4785aef2b2SSteven Lee  interrupt-controller: true
4885aef2b2SSteven Lee
49*3a409859SAndrew Jeffery  '#interrupt-cells':
50*3a409859SAndrew Jeffery    const: 2
51*3a409859SAndrew Jeffery
5285aef2b2SSteven Lee  clocks:
5385aef2b2SSteven Lee    maxItems: 1
5485aef2b2SSteven Lee
5585aef2b2SSteven Lee  ngpios: true
5685aef2b2SSteven Lee
5785aef2b2SSteven Lee  bus-frequency: true
5885aef2b2SSteven Lee
5985aef2b2SSteven Leerequired:
6085aef2b2SSteven Lee  - compatible
6185aef2b2SSteven Lee  - reg
6285aef2b2SSteven Lee  - gpio-controller
6385aef2b2SSteven Lee  - '#gpio-cells'
6485aef2b2SSteven Lee  - interrupts
6585aef2b2SSteven Lee  - interrupt-controller
66*3a409859SAndrew Jeffery  - '#interrupt-cells'
6785aef2b2SSteven Lee  - ngpios
6885aef2b2SSteven Lee  - clocks
6985aef2b2SSteven Lee  - bus-frequency
7085aef2b2SSteven Lee
7185aef2b2SSteven LeeadditionalProperties: false
7285aef2b2SSteven Lee
7385aef2b2SSteven Leeexamples:
7485aef2b2SSteven Lee  - |
7585aef2b2SSteven Lee    #include <dt-bindings/clock/aspeed-clock.h>
7685aef2b2SSteven Lee    sgpio: sgpio@1e780200 {
7785aef2b2SSteven Lee        #gpio-cells = <2>;
7885aef2b2SSteven Lee        compatible = "aspeed,ast2500-sgpio";
7985aef2b2SSteven Lee        gpio-controller;
8085aef2b2SSteven Lee        interrupts = <40>;
8185aef2b2SSteven Lee        reg = <0x1e780200 0x0100>;
8285aef2b2SSteven Lee        clocks = <&syscon ASPEED_CLK_APB>;
8385aef2b2SSteven Lee        interrupt-controller;
84*3a409859SAndrew Jeffery        #interrupt-cells = <2>;
8585aef2b2SSteven Lee        ngpios = <80>;
8685aef2b2SSteven Lee        bus-frequency = <12000000>;
8785aef2b2SSteven Lee    };
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