xref: /linux/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml (revision b9d7eb6a31be296ca0af95641a23c4c758703c0a) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx Zynq Ultrascale MPSoC FPGA Manager Device Tree Bindings
8
9maintainers:
10  - Nava kishore Manne <navam@xilinx.com>
11
12description: |
13  Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
14  The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
15  configure the Programmable Logic (PL). The configuration uses the
16  firmware interface.
17
18properties:
19  compatible:
20    const: xlnx,zynqmp-pcap-fpga
21
22required:
23  - compatible
24
25additionalProperties: false
26
27examples:
28  - |
29    firmware {
30      zynqmp_firmware: zynqmp-firmware {
31        zynqmp_pcap: pcap {
32          compatible = "xlnx,zynqmp-pcap-fpga";
33        };
34      };
35    };
36...
37