xref: /linux/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml (revision 8ccd54fe45713cd458015b5b08d6098545e70543)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
8
9maintainers:
10  - Nava kishore Manne <nava.kishore.manne@amd.com>
11
12description: |
13  The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
14  decouplers/fpga bridges. The controller can decouple/disable the bridges
15  which prevents signal changes from passing through the bridge. The controller
16  can also couple / enable the bridges which allows traffic to pass through the
17  bridge normally.
18  Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
19  is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
20  eXchange AXI shutdown manager prevents AXI traffic from passing through the
21  bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
22  Reconfigurable Partition when it is undergoing dynamic reconfiguration,
23  preventing the system deadlock that can occur if AXI transactions are
24  interrupted by DFX.
25  Please refer to fpga-region.txt and fpga-bridge.txt in this directory for
26  common binding part and usage.
27
28properties:
29  compatible:
30    oneOf:
31      - items:
32          - const: xlnx,pr-decoupler-1.00
33          - const: xlnx,pr-decoupler
34      - items:
35          - const: xlnx,dfx-axi-shutdown-manager-1.00
36          - const: xlnx,dfx-axi-shutdown-manager
37
38  reg:
39    maxItems: 1
40
41  clocks:
42    maxItems: 1
43
44  clock-names:
45    items:
46      - const: aclk
47
48required:
49  - compatible
50  - reg
51  - clocks
52  - clock-names
53
54additionalProperties: false
55
56examples:
57  - |
58    fpga-bridge@100000450 {
59      compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler";
60      reg = <0x10000045 0x10>;
61      clocks = <&clkc 15>;
62      clock-names = "aclk";
63    };
64...
65