1*ee31d503SIvan Bornyakov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ee31d503SIvan Bornyakov%YAML 1.2 3*ee31d503SIvan Bornyakov--- 4*ee31d503SIvan Bornyakov$id: http://devicetree.org/schemas/fpga/lattice,sysconfig.yaml# 5*ee31d503SIvan Bornyakov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ee31d503SIvan Bornyakov 7*ee31d503SIvan Bornyakovtitle: Lattice Slave SPI sysCONFIG FPGA manager 8*ee31d503SIvan Bornyakov 9*ee31d503SIvan Bornyakovmaintainers: 10*ee31d503SIvan Bornyakov - Ivan Bornyakov <i.bornyakov@metrotek.ru> 11*ee31d503SIvan Bornyakov 12*ee31d503SIvan Bornyakovdescription: | 13*ee31d503SIvan Bornyakov Lattice sysCONFIG port, which is used for FPGA configuration, among others, 14*ee31d503SIvan Bornyakov have Slave Serial Peripheral Interface. Only full reconfiguration is 15*ee31d503SIvan Bornyakov supported. 16*ee31d503SIvan Bornyakov 17*ee31d503SIvan Bornyakov Programming of ECP5 is done by writing uncompressed bitstream image in .bit 18*ee31d503SIvan Bornyakov format into FPGA's SRAM configuration memory. 19*ee31d503SIvan Bornyakov 20*ee31d503SIvan Bornyakovproperties: 21*ee31d503SIvan Bornyakov compatible: 22*ee31d503SIvan Bornyakov enum: 23*ee31d503SIvan Bornyakov - lattice,sysconfig-ecp5 24*ee31d503SIvan Bornyakov 25*ee31d503SIvan Bornyakov reg: 26*ee31d503SIvan Bornyakov maxItems: 1 27*ee31d503SIvan Bornyakov 28*ee31d503SIvan Bornyakov program-gpios: 29*ee31d503SIvan Bornyakov description: 30*ee31d503SIvan Bornyakov A GPIO line connected to PROGRAMN (active low) pin of the device. 31*ee31d503SIvan Bornyakov Initiates configuration sequence. 32*ee31d503SIvan Bornyakov maxItems: 1 33*ee31d503SIvan Bornyakov 34*ee31d503SIvan Bornyakov init-gpios: 35*ee31d503SIvan Bornyakov description: 36*ee31d503SIvan Bornyakov A GPIO line connected to INITN (active low) pin of the device. 37*ee31d503SIvan Bornyakov Indicates that the FPGA is ready to be configured. 38*ee31d503SIvan Bornyakov maxItems: 1 39*ee31d503SIvan Bornyakov 40*ee31d503SIvan Bornyakov done-gpios: 41*ee31d503SIvan Bornyakov description: 42*ee31d503SIvan Bornyakov A GPIO line connected to DONE (active high) pin of the device. 43*ee31d503SIvan Bornyakov Indicates that the configuration sequence is complete. 44*ee31d503SIvan Bornyakov maxItems: 1 45*ee31d503SIvan Bornyakov 46*ee31d503SIvan Bornyakovrequired: 47*ee31d503SIvan Bornyakov - compatible 48*ee31d503SIvan Bornyakov - reg 49*ee31d503SIvan Bornyakov 50*ee31d503SIvan BornyakovallOf: 51*ee31d503SIvan Bornyakov - $ref: /schemas/spi/spi-peripheral-props.yaml 52*ee31d503SIvan Bornyakov 53*ee31d503SIvan Bornyakov - if: 54*ee31d503SIvan Bornyakov properties: 55*ee31d503SIvan Bornyakov compatible: 56*ee31d503SIvan Bornyakov contains: 57*ee31d503SIvan Bornyakov const: lattice,sysconfig-ecp5 58*ee31d503SIvan Bornyakov then: 59*ee31d503SIvan Bornyakov properties: 60*ee31d503SIvan Bornyakov spi-max-frequency: 61*ee31d503SIvan Bornyakov maximum: 60000000 62*ee31d503SIvan Bornyakov 63*ee31d503SIvan BornyakovunevaluatedProperties: false 64*ee31d503SIvan Bornyakov 65*ee31d503SIvan Bornyakovexamples: 66*ee31d503SIvan Bornyakov - | 67*ee31d503SIvan Bornyakov #include <dt-bindings/gpio/gpio.h> 68*ee31d503SIvan Bornyakov 69*ee31d503SIvan Bornyakov spi { 70*ee31d503SIvan Bornyakov #address-cells = <1>; 71*ee31d503SIvan Bornyakov #size-cells = <0>; 72*ee31d503SIvan Bornyakov 73*ee31d503SIvan Bornyakov fpga-mgr@0 { 74*ee31d503SIvan Bornyakov compatible = "lattice,sysconfig-ecp5"; 75*ee31d503SIvan Bornyakov reg = <0>; 76*ee31d503SIvan Bornyakov spi-max-frequency = <20000000>; 77*ee31d503SIvan Bornyakov program-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; 78*ee31d503SIvan Bornyakov init-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>; 79*ee31d503SIvan Bornyakov done-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>; 80*ee31d503SIvan Bornyakov }; 81*ee31d503SIvan Bornyakov }; 82