xref: /linux/Documentation/devicetree/bindings/fpga/altr,fpga-passive-serial.yaml (revision fcc79e1714e8c2b8e216dc3149812edd37884eef) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/altr,fpga-passive-serial.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Altera Passive Serial SPI FPGA Manager
8
9maintainers:
10  - Fabio Estevam <festevam@denx.de>
11
12description: |
13  Altera FPGAs support a method of loading the bitstream over what is
14  referred to as "passive serial".
15  The passive serial link is not technically SPI, and might require extra
16  circuits in order to play nicely with other SPI slaves on the same bus.
17
18  See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
19
20allOf:
21  - $ref: /schemas/spi/spi-peripheral-props.yaml#
22
23properties:
24  compatible:
25    enum:
26      - altr,fpga-passive-serial
27      - altr,fpga-arria10-passive-serial
28
29  spi-max-frequency:
30    maximum: 20000000
31
32  reg:
33    maxItems: 1
34
35  nconfig-gpios:
36    description:
37      Config pin (referred to as nCONFIG in the manual).
38    maxItems: 1
39
40  nstat-gpios:
41    description:
42      Status pin (referred to as nSTATUS in the manual).
43    maxItems: 1
44
45  confd-gpios:
46    description:
47      confd pin (referred to as CONF_DONE in the manual)
48    maxItems: 1
49
50required:
51  - compatible
52  - reg
53  - nconfig-gpios
54  - nstat-gpios
55
56additionalProperties: false
57
58examples:
59  - |
60    #include <dt-bindings/gpio/gpio.h>
61
62    spi {
63      #address-cells = <1>;
64      #size-cells = <0>;
65
66      fpga@0 {
67        compatible = "altr,fpga-passive-serial";
68        reg = <0>;
69        nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
70        nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
71        confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
72      };
73    };
74...
75