1*22439cf4SMichal Simek# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*22439cf4SMichal Simek%YAML 1.2 3*22439cf4SMichal Simek--- 4*22439cf4SMichal Simek$id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml# 5*22439cf4SMichal Simek$schema: http://devicetree.org/meta-schemas/core.yaml# 6*22439cf4SMichal Simek 7*22439cf4SMichal Simektitle: Altera Freeze Bridge Controller 8*22439cf4SMichal Simek 9*22439cf4SMichal Simekdescription: 10*22439cf4SMichal Simek The Altera Freeze Bridge Controller manages one or more freeze bridges. 11*22439cf4SMichal Simek The controller can freeze/disable the bridges which prevents signal 12*22439cf4SMichal Simek changes from passing through the bridge. The controller can also 13*22439cf4SMichal Simek unfreeze/enable the bridges which allows traffic to pass through the bridge 14*22439cf4SMichal Simek normally. 15*22439cf4SMichal Simek 16*22439cf4SMichal Simekmaintainers: 17*22439cf4SMichal Simek - Xu Yilun <yilun.xu@intel.com> 18*22439cf4SMichal Simek 19*22439cf4SMichal SimekallOf: 20*22439cf4SMichal Simek - $ref: fpga-bridge.yaml# 21*22439cf4SMichal Simek 22*22439cf4SMichal Simekproperties: 23*22439cf4SMichal Simek compatible: 24*22439cf4SMichal Simek const: altr,freeze-bridge-controller 25*22439cf4SMichal Simek 26*22439cf4SMichal Simek reg: 27*22439cf4SMichal Simek maxItems: 1 28*22439cf4SMichal Simek 29*22439cf4SMichal Simekrequired: 30*22439cf4SMichal Simek - compatible 31*22439cf4SMichal Simek - reg 32*22439cf4SMichal Simek 33*22439cf4SMichal SimekunevaluatedProperties: false 34*22439cf4SMichal Simek 35*22439cf4SMichal Simekexamples: 36*22439cf4SMichal Simek - | 37*22439cf4SMichal Simek fpga-bridge@100000450 { 38*22439cf4SMichal Simek compatible = "altr,freeze-bridge-controller"; 39*22439cf4SMichal Simek reg = <0x1000 0x10>; 40*22439cf4SMichal Simek bridge-enable = <0>; 41*22439cf4SMichal Simek }; 42