xref: /linux/Documentation/devicetree/bindings/firmware/qcom,scm.yaml (revision 67f49869106f78882a8a09b736d4884be85aba18) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: QCOM Secure Channel Manager (SCM)
8
9description: |
10  Qualcomm processors include an interface to communicate to the secure firmware.
11  This interface allows for clients to request different types of actions.
12  These can include CPU power up/down, HDCP requests, loading of firmware,
13  and other assorted actions.
14
15maintainers:
16  - Bjorn Andersson <bjorn.andersson@linaro.org>
17  - Robert Marko <robimarko@gmail.com>
18  - Guru Das Srinagesh <quic_gurus@quicinc.com>
19
20properties:
21  compatible:
22    items:
23      - enum:
24          - qcom,scm-apq8064
25          - qcom,scm-apq8084
26          - qcom,scm-ipq4019
27          - qcom,scm-ipq6018
28          - qcom,scm-ipq806x
29          - qcom,scm-ipq8074
30          - qcom,scm-mdm9607
31          - qcom,scm-msm8226
32          - qcom,scm-msm8660
33          - qcom,scm-msm8916
34          - qcom,scm-msm8953
35          - qcom,scm-msm8960
36          - qcom,scm-msm8974
37          - qcom,scm-msm8976
38          - qcom,scm-msm8994
39          - qcom,scm-msm8996
40          - qcom,scm-msm8998
41          - qcom,scm-sc7180
42          - qcom,scm-sc7280
43          - qcom,scm-sc8280xp
44          - qcom,scm-sdm670
45          - qcom,scm-sdm845
46          - qcom,scm-sdx55
47          - qcom,scm-sdx65
48          - qcom,scm-sm6115
49          - qcom,scm-sm6125
50          - qcom,scm-sm6350
51          - qcom,scm-sm6375
52          - qcom,scm-sm8150
53          - qcom,scm-sm8250
54          - qcom,scm-sm8350
55          - qcom,scm-sm8450
56          - qcom,scm-qcs404
57      - const: qcom,scm
58
59  clocks:
60    minItems: 1
61    maxItems: 3
62
63  clock-names:
64    minItems: 1
65    maxItems: 3
66
67  interconnects:
68    maxItems: 1
69
70  interconnect-names:
71    maxItems: 1
72
73  '#reset-cells':
74    const: 1
75
76  qcom,dload-mode:
77    $ref: /schemas/types.yaml#/definitions/phandle-array
78    items:
79      - items:
80          - description: phandle to TCSR hardware block
81          - description: offset of the download mode control register
82    description: TCSR hardware block
83
84allOf:
85  - if:
86      properties:
87        compatible:
88          contains:
89            enum:
90              - qcom,scm-apq8064
91              - qcom,scm-msm8660
92              - qcom,scm-msm8960
93              - qcom,scm-sm6375
94    then:
95      properties:
96        clock-names:
97          items:
98            - const: core
99
100        clocks:
101          maxItems: 1
102
103      required:
104        - clocks
105        - clock-names
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            enum:
112              - qcom,scm-apq8084
113              - qcom,scm-mdm9607
114              - qcom,scm-msm8916
115              - qcom,scm-msm8953
116              - qcom,scm-msm8974
117              - qcom,scm-msm8976
118    then:
119      properties:
120        clock-names:
121          items:
122            - const: core
123            - const: bus
124            - const: iface
125
126        clocks:
127          minItems: 3
128          maxItems: 3
129
130      required:
131        - clocks
132        - clock-names
133
134required:
135  - compatible
136
137additionalProperties: false
138
139examples:
140  - |
141    #include <dt-bindings/clock/qcom,gcc-msm8916.h>
142
143    firmware {
144        scm {
145            compatible = "qcom,scm-msm8916", "qcom,scm";
146            clocks = <&gcc GCC_CRYPTO_CLK>,
147                     <&gcc GCC_CRYPTO_AXI_CLK>,
148                     <&gcc GCC_CRYPTO_AHB_CLK>;
149            clock-names = "core", "bus", "iface";
150        };
151    };
152