xref: /linux/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright (C) 2025 Altera Corporation
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/edac/altr,socfpga-ecc-manager.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Altera SoCFPGA ECC Manager
9
10maintainers:
11  - Matthew Gerlach <matthew.gerlach@altera.com>
12
13description:
14  This binding describes the device tree nodes required for the Altera SoCFPGA
15  ECC Manager for the Cyclone5, Arria5, Arria10, Stratix10, and Agilex chip
16  families.
17
18properties:
19
20  compatible:
21    oneOf:
22      - items:
23          - const: altr,socfpga-s10-ecc-manager
24          - const: altr,socfpga-a10-ecc-manager
25      - const: altr,socfpga-a10-ecc-manager
26      - const: altr,socfpga-ecc-manager
27
28  "#address-cells":
29    const: 1
30
31  "#size-cells":
32    const: 1
33
34  interrupts:
35    minItems: 1
36    maxItems: 2
37
38  interrupt-controller: true
39
40  "#interrupt-cells":
41    const: 2
42
43  ranges: true
44
45  altr,sysmgr-syscon:
46    $ref: /schemas/types.yaml#/definitions/phandle
47    description: phandle to Stratix10 System Manager Block with the ECC manager registers
48
49  sdramedac:
50    type: object
51    additionalProperties: false
52
53    properties:
54      compatible:
55        enum:
56          - altr,sdram-edac
57          - altr,sdram-edac-a10
58          - altr,sdram-edac-s10
59
60      interrupts:
61        minItems: 1
62        maxItems: 2
63
64      altr,sdr-syscon:
65        $ref: /schemas/types.yaml#/definitions/phandle
66        description: phandle to SDRAM parent
67
68    required:
69      - compatible
70      - interrupts
71      - altr,sdr-syscon
72
73patternProperties:
74  "^ocram-ecc@[a-f0-9]+$":
75    type: object
76    additionalProperties: false
77
78    properties:
79      compatible:
80        oneOf:
81          - items:
82              - const: altr,socfpga-s10-ocram-ecc
83              - const: altr,socfpga-a10-ocram-ecc
84          - const: altr,socfpga-a10-ocram-ecc
85          - const: altr,socfpga-ocram-ecc
86
87      reg:
88        maxItems: 1
89
90      interrupts:
91        minItems: 1
92        maxItems: 2
93
94      iram:
95        $ref: /schemas/types.yaml#/definitions/phandle
96        description: phandle to OCRAM parent
97
98      altr,ecc-parent:
99        $ref: /schemas/types.yaml#/definitions/phandle
100        description: phandle to OCRAM parent
101
102    required:
103      - compatible
104      - reg
105      - interrupts
106
107  "^usb[0-9]-ecc@[a-f0-9]+$":
108    type: object
109    additionalProperties: false
110
111    properties:
112      compatible:
113        oneOf:
114          - items:
115              - const: altr,socfpga-s10-usb-ecc
116              - const: altr,socfpga-usb-ecc
117          - const: altr,socfpga-usb-ecc
118
119      reg:
120        maxItems: 1
121
122      interrupts:
123        minItems: 1
124        maxItems: 2
125
126      altr,ecc-parent:
127        $ref: /schemas/types.yaml#/definitions/phandle
128        description: phandle to USB parent
129
130    required:
131      - compatible
132      - reg
133      - interrupts
134      - altr,ecc-parent
135
136  "^emac[0-9]-[t,r]x-ecc@[a-f0-9]+$":
137    type: object
138    additionalProperties: false
139
140    properties:
141      compatible:
142        oneOf:
143          - items:
144              - const: altr,socfpga-s10-eth-mac-ecc
145              - const: altr,socfpga-eth-mac-ecc
146          - const: altr,socfpga-eth-mac-ecc
147
148      reg:
149        maxItems: 1
150
151      interrupts:
152        minItems: 1
153        maxItems: 2
154
155      altr,ecc-parent:
156        $ref: /schemas/types.yaml#/definitions/phandle
157        description: phandle to ethernet parent
158
159    required:
160      - compatible
161      - reg
162      - interrupts
163      - altr,ecc-parent
164
165  "^sdmmc[a-f]-ecc@[a-f0-9]+$":
166    type: object
167    additionalProperties: false
168
169    properties:
170      compatible:
171        oneOf:
172          - items:
173              - const: altr,socfpga-s10-sdmmc-ecc
174              - const: altr,socfpga-sdmmc-ecc
175          - const: altr,socfpga-sdmmc-ecc
176
177      reg:
178        maxItems: 1
179
180      interrupts:
181        minItems: 2
182        maxItems: 4
183
184      altr,ecc-parent:
185        $ref: /schemas/types.yaml#/definitions/phandle
186        description: phandle to SD/MMC parent
187
188    required:
189      - compatible
190      - reg
191      - interrupts
192      - altr,ecc-parent
193
194  "^l2-ecc@[a-f0-9]+$":
195    type: object
196    additionalProperties: false
197
198    properties:
199      compatible:
200        enum:
201          - altr,socfpga-a10-l2-ecc
202          - altr,socfpga-l2-ecc
203
204      reg:
205        maxItems: 1
206
207      interrupts:
208        maxItems: 2
209
210    required:
211      - compatible
212      - reg
213      - interrupts
214
215  "^dma-ecc@[a-f0-9]+$":
216    type: object
217    additionalProperties: false
218
219    properties:
220      compatible:
221        const: altr,socfpga-dma-ecc
222      reg:
223        maxItems: 1
224
225      interrupts:
226        maxItems: 2
227
228      altr,ecc-parent:
229        $ref: /schemas/types.yaml#/definitions/phandle
230        description: phandle to SD/MMC parent
231
232    required:
233      - compatible
234      - reg
235      - interrupts
236      - altr,ecc-parent
237
238if:
239  properties:
240    compatible:
241      contains:
242        const: altr,socfpga-ecc-manager
243then:
244  required:
245    - compatible
246    - "#address-cells"
247    - "#size-cells"
248    - ranges
249
250else:
251  required:
252    - compatible
253    - "#address-cells"
254    - "#size-cells"
255    - interrupts
256    - interrupt-controller
257    - "#interrupt-cells"
258    - ranges
259    - altr,sysmgr-syscon
260
261additionalProperties: false
262
263examples:
264  - |
265    #include <dt-bindings/interrupt-controller/arm-gic.h>
266    #include <dt-bindings/interrupt-controller/irq.h>
267    eccmgr {
268        compatible = "altr,socfpga-s10-ecc-manager",
269                     "altr,socfpga-a10-ecc-manager";
270        altr,sysmgr-syscon = <&sysmgr>;
271        #address-cells = <1>;
272        #size-cells = <1>;
273        interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
274        interrupt-controller;
275        #interrupt-cells = <2>;
276        ranges;
277
278        sdramedac {
279            compatible = "altr,sdram-edac-s10";
280            altr,sdr-syscon = <&sdr>;
281            interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
282        };
283
284        ocram-ecc@ff8cc000 {
285            compatible = "altr,socfpga-s10-ocram-ecc",
286                         "altr,socfpga-a10-ocram-ecc";
287            reg = <0xff8cc000 0x100>;
288            altr,ecc-parent = <&ocram>;
289            interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
290        };
291
292        usb0-ecc@ff8c4000 {
293            compatible = "altr,socfpga-s10-usb-ecc",
294                         "altr,socfpga-usb-ecc";
295            reg = <0xff8c4000 0x100>;
296            altr,ecc-parent = <&usb0>;
297            interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
298        };
299
300        emac0-rx-ecc@ff8c0000 {
301            compatible = "altr,socfpga-s10-eth-mac-ecc",
302                         "altr,socfpga-eth-mac-ecc";
303            reg = <0xff8c0000 0x100>;
304            altr,ecc-parent = <&gmac0>;
305            interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
306        };
307
308        emac0-tx-ecc@ff8c0400 {
309            compatible = "altr,socfpga-s10-eth-mac-ecc",
310                         "altr,socfpga-eth-mac-ecc";
311            reg = <0xff8c0400 0x100>;
312            altr,ecc-parent = <&gmac0>;
313            interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
314        };
315
316        sdmmca-ecc@ff8c8c00 {
317            compatible = "altr,socfpga-s10-sdmmc-ecc",
318                         "altr,socfpga-sdmmc-ecc";
319            reg = <0xff8c8c00 0x100>;
320            altr,ecc-parent = <&mmc>;
321            interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
322                         <15 IRQ_TYPE_LEVEL_HIGH>;
323        };
324    };
325