xref: /linux/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
15a04982dSMichael Tretter# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
25a04982dSMichael Tretter%YAML 1.2
35a04982dSMichael Tretter---
45a04982dSMichael Tretter$id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml#
55a04982dSMichael Tretter$schema: http://devicetree.org/meta-schemas/core.yaml#
65a04982dSMichael Tretter
75a04982dSMichael Trettertitle: Xilinx ZynqMP DMA Engine
85a04982dSMichael Tretter
95a04982dSMichael Tretterdescription: |
105a04982dSMichael Tretter  The Xilinx ZynqMP DMA engine supports memory to memory transfers,
115a04982dSMichael Tretter  memory to device and device to memory transfers. It also has flow
125a04982dSMichael Tretter  control and rate control support for slave/peripheral dma access.
135a04982dSMichael Tretter
145a04982dSMichael Trettermaintainers:
155a04982dSMichael Tretter  - Michael Tretter <m.tretter@pengutronix.de>
1654a5aff6SRadhey Shyam Pandey  - Harini Katakam <harini.katakam@amd.com>
1754a5aff6SRadhey Shyam Pandey  - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
185a04982dSMichael Tretter
195a04982dSMichael TretterallOf:
20894abe0dSRob Herring  - $ref: ../dma-controller.yaml#
215a04982dSMichael Tretter
225a04982dSMichael Tretterproperties:
235a04982dSMichael Tretter  "#dma-cells":
245a04982dSMichael Tretter    const: 1
255a04982dSMichael Tretter
265a04982dSMichael Tretter  compatible:
27*36545c6aSAbin Joseph    enum:
28*36545c6aSAbin Joseph      - amd,versal2-dma-1.0
29*36545c6aSAbin Joseph      - xlnx,zynqmp-dma-1.0
305a04982dSMichael Tretter
315a04982dSMichael Tretter  reg:
325a04982dSMichael Tretter    description: memory map for gdma/adma module access
335a04982dSMichael Tretter    maxItems: 1
345a04982dSMichael Tretter
355a04982dSMichael Tretter  interrupts:
365a04982dSMichael Tretter    description: DMA channel interrupt
375a04982dSMichael Tretter    maxItems: 1
385a04982dSMichael Tretter
395a04982dSMichael Tretter  clocks:
405a04982dSMichael Tretter    description: input clocks
415a04982dSMichael Tretter    minItems: 2
425a04982dSMichael Tretter    maxItems: 2
435a04982dSMichael Tretter
445a04982dSMichael Tretter  clock-names:
455a04982dSMichael Tretter    items:
465a04982dSMichael Tretter      - const: clk_main
475a04982dSMichael Tretter      - const: clk_apb
485a04982dSMichael Tretter
495a04982dSMichael Tretter  xlnx,bus-width:
505a04982dSMichael Tretter    $ref: /schemas/types.yaml#/definitions/uint32
515a04982dSMichael Tretter    enum:
525a04982dSMichael Tretter      - 64
535a04982dSMichael Tretter      - 128
545a04982dSMichael Tretter    description: AXI bus width in bits
555a04982dSMichael Tretter
565a04982dSMichael Tretter  iommus:
575a04982dSMichael Tretter    maxItems: 1
585a04982dSMichael Tretter
595a04982dSMichael Tretter  power-domains:
605a04982dSMichael Tretter    maxItems: 1
615a04982dSMichael Tretter
625a04982dSMichael Tretter  dma-coherent:
635a04982dSMichael Tretter    description: present if dma operations are coherent
645a04982dSMichael Tretter
655a04982dSMichael Tretterrequired:
665a04982dSMichael Tretter  - "#dma-cells"
675a04982dSMichael Tretter  - compatible
685a04982dSMichael Tretter  - reg
695a04982dSMichael Tretter  - interrupts
705a04982dSMichael Tretter  - clocks
715a04982dSMichael Tretter  - clock-names
7254a5aff6SRadhey Shyam Pandey  - xlnx,bus-width
735a04982dSMichael Tretter
745a04982dSMichael TretteradditionalProperties: false
755a04982dSMichael Tretter
765a04982dSMichael Tretterexamples:
775a04982dSMichael Tretter  - |
785a04982dSMichael Tretter    #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
795a04982dSMichael Tretter
805a04982dSMichael Tretter    fpd_dma_chan1: dma-controller@fd500000 {
815a04982dSMichael Tretter      compatible = "xlnx,zynqmp-dma-1.0";
825a04982dSMichael Tretter      reg = <0xfd500000 0x1000>;
835a04982dSMichael Tretter      interrupt-parent = <&gic>;
845a04982dSMichael Tretter      interrupts = <0 117 0x4>;
855a04982dSMichael Tretter      #dma-cells = <1>;
865a04982dSMichael Tretter      clock-names = "clk_main", "clk_apb";
875a04982dSMichael Tretter      clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
885a04982dSMichael Tretter      xlnx,bus-width = <128>;
895a04982dSMichael Tretter      dma-coherent;
905a04982dSMichael Tretter    };
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