1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: SiFive Unleashed Rev C000 Platform DMA 8 9maintainers: 10 - Green Wan <green.wan@sifive.com> 11 - Palmer Debbelt <palmer@sifive.com> 12 - Paul Walmsley <paul.walmsley@sifive.com> 13 14description: | 15 Platform DMA is a DMA engine of SiFive Unleashed. It supports 4 16 channels. Each channel has 2 interrupts. One is for DMA done and 17 the other is for DME error. 18 19 In different SoC, DMA could be attached to different IRQ line. 20 DT file need to be changed to meet the difference. For technical 21 doc, 22 23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf 24 25allOf: 26 - $ref: dma-controller.yaml# 27 28properties: 29 compatible: 30 oneOf: 31 - items: 32 - const: microchip,pic64gx-pdma 33 - const: microchip,mpfs-pdma 34 - const: sifive,pdma0 35 - items: 36 - enum: 37 - microchip,mpfs-pdma 38 - sifive,fu540-c000-pdma 39 - const: sifive,pdma0 40 description: 41 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>". 42 Supported compatible strings are - 43 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the 44 SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block 45 with no chip integration tweaks. 46 47 reg: 48 maxItems: 1 49 50 interrupts: 51 minItems: 1 52 maxItems: 8 53 54 dma-channels: 55 description: For backwards-compatibility, the default value is 4 56 minimum: 1 57 maximum: 4 58 default: 4 59 60 '#dma-cells': 61 const: 1 62 63required: 64 - compatible 65 - reg 66 - interrupts 67 68unevaluatedProperties: false 69 70examples: 71 - | 72 dma-controller@3000000 { 73 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; 74 reg = <0x3000000 0x8000>; 75 dma-channels = <4>; 76 interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, <30>; 77 #dma-cells = <1>; 78 }; 79 80... 81