xref: /linux/Documentation/devicetree/bindings/dma/owl-dma.yaml (revision f9bff0e31881d03badf191d3b0005839391f5f2b) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Actions Semi Owl SoCs DMA controller
8
9description: |
10  The OWL DMA is a general-purpose direct memory access controller capable of
11  supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
12  independent DMA channels for the S500 and S900 SoC variants.
13
14maintainers:
15  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
16
17allOf:
18  - $ref: dma-controller.yaml#
19
20properties:
21  compatible:
22    enum:
23      - actions,s500-dma
24      - actions,s700-dma
25      - actions,s900-dma
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    description:
32      controller supports 4 interrupts, which are freely assignable to the
33      DMA channels.
34    maxItems: 4
35
36  "#dma-cells":
37    const: 1
38
39  dma-channels:
40    maximum: 12
41
42  dma-requests:
43    maximum: 46
44
45  clocks:
46    maxItems: 1
47    description:
48      Phandle and Specifier of the clock feeding the DMA controller.
49
50  power-domains:
51    maxItems: 1
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - "#dma-cells"
58  - dma-channels
59  - dma-requests
60  - clocks
61
62unevaluatedProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/interrupt-controller/arm-gic.h>
67    dma: dma-controller@e0260000 {
68        compatible = "actions,s900-dma";
69        reg = <0xe0260000 0x1000>;
70        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
71                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
72                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
73                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
74        #dma-cells = <1>;
75        dma-channels = <12>;
76        dma-requests = <46>;
77        clocks = <&clock 22>;
78    };
79
80...
81