1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP Layerscape SoC qDMA Controller 8 9maintainers: 10 - Frank Li <Frank.Li@nxp.com> 11 12properties: 13 compatible: 14 enum: 15 - fsl,ls1021a-qdma 16 - fsl,ls1028a-qdma 17 - fsl,ls1043a-qdma 18 - fsl,ls1046a-qdma 19 20 reg: 21 items: 22 - description: Controller regs 23 - description: Status regs 24 - description: Block regs 25 26 interrupts: 27 minItems: 2 28 maxItems: 5 29 30 interrupt-names: 31 minItems: 2 32 items: 33 - const: qdma-error 34 - const: qdma-queue0 35 - const: qdma-queue1 36 - const: qdma-queue2 37 - const: qdma-queue3 38 39 dma-channels: 40 minimum: 1 41 maximum: 64 42 43 fsl,dma-queues: 44 $ref: /schemas/types.yaml#/definitions/uint32 45 description: Should contain number of queues supported. 46 minimum: 1 47 maximum: 4 48 49 block-number: 50 $ref: /schemas/types.yaml#/definitions/uint32 51 description: the virtual block number 52 53 block-offset: 54 $ref: /schemas/types.yaml#/definitions/uint32 55 description: the offset of different virtual block 56 57 status-sizes: 58 $ref: /schemas/types.yaml#/definitions/uint32 59 description: status queue size of per virtual block 60 61 queue-sizes: 62 $ref: /schemas/types.yaml#/definitions/uint32-array 63 description: 64 command queue size of per virtual block, the size number 65 based on queues 66 67 big-endian: 68 $ref: /schemas/types.yaml#/definitions/flag 69 description: 70 If present registers and hardware scatter/gather descriptors 71 of the qDMA are implemented in big endian mode, otherwise in little 72 mode. 73 74required: 75 - compatible 76 - reg 77 - interrupts 78 - interrupt-names 79 - fsl,dma-queues 80 - block-number 81 - block-offset 82 - status-sizes 83 - queue-sizes 84 85allOf: 86 - $ref: dma-controller.yaml# 87 - if: 88 properties: 89 compatible: 90 contains: 91 enum: 92 - fsl,ls1028a-qdma 93 - fsl,ls1043a-qdma 94 - fsl,ls1046a-qdma 95 then: 96 properties: 97 interrupts: 98 minItems: 5 99 interrupt-names: 100 minItems: 5 101 else: 102 properties: 103 interrupts: 104 maxItems: 3 105 interrupt-names: 106 maxItems: 3 107 108unevaluatedProperties: false 109 110examples: 111 - | 112 #include <dt-bindings/interrupt-controller/arm-gic.h> 113 114 dma-controller@8390000 { 115 compatible = "fsl,ls1021a-qdma"; 116 reg = <0x8388000 0x1000>, /* Controller regs */ 117 <0x8389000 0x1000>, /* Status regs */ 118 <0x838a000 0x2000>; /* Block regs */ 119 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 120 <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, 121 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 122 interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1"; 123 #dma-cells = <1>; 124 dma-channels = <8>; 125 block-number = <2>; 126 block-offset = <0x1000>; 127 status-sizes = <64>; 128 queue-sizes = <64 64>; 129 big-endian; 130 fsl,dma-queues = <2>; 131 }; 132 133