1*1fe283e8SJ. Neuschäfer# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1fe283e8SJ. Neuschäfer%YAML 1.2 3*1fe283e8SJ. Neuschäfer--- 4*1fe283e8SJ. Neuschäfer$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml# 5*1fe283e8SJ. Neuschäfer$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1fe283e8SJ. Neuschäfer 7*1fe283e8SJ. Neuschäfertitle: Freescale Elo3 DMA Controller 8*1fe283e8SJ. Neuschäfer 9*1fe283e8SJ. Neuschäfermaintainers: 10*1fe283e8SJ. Neuschäfer - J. Neuschäfer <j.ne@posteo.net> 11*1fe283e8SJ. Neuschäfer 12*1fe283e8SJ. Neuschäferdescription: 13*1fe283e8SJ. Neuschäfer DMA controller which has same function as EloPlus except that Elo3 has 8 14*1fe283e8SJ. Neuschäfer channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx 15*1fe283e8SJ. Neuschäfer series chips, such as t1040, t4240, b4860. 16*1fe283e8SJ. Neuschäfer 17*1fe283e8SJ. Neuschäferproperties: 18*1fe283e8SJ. Neuschäfer compatible: 19*1fe283e8SJ. Neuschäfer const: fsl,elo3-dma 20*1fe283e8SJ. Neuschäfer 21*1fe283e8SJ. Neuschäfer reg: 22*1fe283e8SJ. Neuschäfer items: 23*1fe283e8SJ. Neuschäfer - description: 24*1fe283e8SJ. Neuschäfer DMA General Status Registers starting from DGSR0, for channel 1~4 25*1fe283e8SJ. Neuschäfer - description: 26*1fe283e8SJ. Neuschäfer DMA General Status Registers starting from DGSR1, for channel 5~8 27*1fe283e8SJ. Neuschäfer 28*1fe283e8SJ. Neuschäfer ranges: true 29*1fe283e8SJ. Neuschäfer 30*1fe283e8SJ. Neuschäfer "#address-cells": 31*1fe283e8SJ. Neuschäfer const: 1 32*1fe283e8SJ. Neuschäfer 33*1fe283e8SJ. Neuschäfer "#size-cells": 34*1fe283e8SJ. Neuschäfer const: 1 35*1fe283e8SJ. Neuschäfer 36*1fe283e8SJ. Neuschäfer interrupts: 37*1fe283e8SJ. Neuschäfer maxItems: 1 38*1fe283e8SJ. Neuschäfer 39*1fe283e8SJ. NeuschäferpatternProperties: 40*1fe283e8SJ. Neuschäfer "^dma-channel@[0-9a-f]+$": 41*1fe283e8SJ. Neuschäfer type: object 42*1fe283e8SJ. Neuschäfer additionalProperties: false 43*1fe283e8SJ. Neuschäfer 44*1fe283e8SJ. Neuschäfer properties: 45*1fe283e8SJ. Neuschäfer compatible: 46*1fe283e8SJ. Neuschäfer enum: 47*1fe283e8SJ. Neuschäfer # native DMA channel 48*1fe283e8SJ. Neuschäfer - fsl,eloplus-dma-channel 49*1fe283e8SJ. Neuschäfer 50*1fe283e8SJ. Neuschäfer # audio DMA channel, see fsl,ssi.yaml 51*1fe283e8SJ. Neuschäfer - fsl,ssi-dma-channel 52*1fe283e8SJ. Neuschäfer 53*1fe283e8SJ. Neuschäfer reg: 54*1fe283e8SJ. Neuschäfer maxItems: 1 55*1fe283e8SJ. Neuschäfer 56*1fe283e8SJ. Neuschäfer interrupts: 57*1fe283e8SJ. Neuschäfer maxItems: 1 58*1fe283e8SJ. Neuschäfer description: 59*1fe283e8SJ. Neuschäfer Per-channel interrupt. Only necessary if no controller interrupt has 60*1fe283e8SJ. Neuschäfer been provided. 61*1fe283e8SJ. Neuschäfer 62*1fe283e8SJ. NeuschäferadditionalProperties: false 63*1fe283e8SJ. Neuschäfer 64*1fe283e8SJ. Neuschäferexamples: 65*1fe283e8SJ. Neuschäfer - | 66*1fe283e8SJ. Neuschäfer #include <dt-bindings/interrupt-controller/irq.h> 67*1fe283e8SJ. Neuschäfer 68*1fe283e8SJ. Neuschäfer dma@100300 { 69*1fe283e8SJ. Neuschäfer compatible = "fsl,elo3-dma"; 70*1fe283e8SJ. Neuschäfer reg = <0x100300 0x4>, 71*1fe283e8SJ. Neuschäfer <0x100600 0x4>; 72*1fe283e8SJ. Neuschäfer #address-cells = <1>; 73*1fe283e8SJ. Neuschäfer #size-cells = <1>; 74*1fe283e8SJ. Neuschäfer ranges = <0x0 0x100100 0x500>; 75*1fe283e8SJ. Neuschäfer 76*1fe283e8SJ. Neuschäfer dma-channel@0 { 77*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 78*1fe283e8SJ. Neuschäfer reg = <0x0 0x80>; 79*1fe283e8SJ. Neuschäfer interrupts = <28 IRQ_TYPE_EDGE_FALLING 0 0>; 80*1fe283e8SJ. Neuschäfer }; 81*1fe283e8SJ. Neuschäfer 82*1fe283e8SJ. Neuschäfer dma-channel@80 { 83*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 84*1fe283e8SJ. Neuschäfer reg = <0x80 0x80>; 85*1fe283e8SJ. Neuschäfer interrupts = <29 IRQ_TYPE_EDGE_FALLING 0 0>; 86*1fe283e8SJ. Neuschäfer }; 87*1fe283e8SJ. Neuschäfer 88*1fe283e8SJ. Neuschäfer dma-channel@100 { 89*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 90*1fe283e8SJ. Neuschäfer reg = <0x100 0x80>; 91*1fe283e8SJ. Neuschäfer interrupts = <30 IRQ_TYPE_EDGE_FALLING 0 0>; 92*1fe283e8SJ. Neuschäfer }; 93*1fe283e8SJ. Neuschäfer 94*1fe283e8SJ. Neuschäfer dma-channel@180 { 95*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 96*1fe283e8SJ. Neuschäfer reg = <0x180 0x80>; 97*1fe283e8SJ. Neuschäfer interrupts = <31 IRQ_TYPE_EDGE_FALLING 0 0>; 98*1fe283e8SJ. Neuschäfer }; 99*1fe283e8SJ. Neuschäfer 100*1fe283e8SJ. Neuschäfer dma-channel@300 { 101*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 102*1fe283e8SJ. Neuschäfer reg = <0x300 0x80>; 103*1fe283e8SJ. Neuschäfer interrupts = <76 IRQ_TYPE_EDGE_FALLING 0 0>; 104*1fe283e8SJ. Neuschäfer }; 105*1fe283e8SJ. Neuschäfer 106*1fe283e8SJ. Neuschäfer dma-channel@380 { 107*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 108*1fe283e8SJ. Neuschäfer reg = <0x380 0x80>; 109*1fe283e8SJ. Neuschäfer interrupts = <77 IRQ_TYPE_EDGE_FALLING 0 0>; 110*1fe283e8SJ. Neuschäfer }; 111*1fe283e8SJ. Neuschäfer 112*1fe283e8SJ. Neuschäfer dma-channel@400 { 113*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 114*1fe283e8SJ. Neuschäfer reg = <0x400 0x80>; 115*1fe283e8SJ. Neuschäfer interrupts = <78 IRQ_TYPE_EDGE_FALLING 0 0>; 116*1fe283e8SJ. Neuschäfer }; 117*1fe283e8SJ. Neuschäfer 118*1fe283e8SJ. Neuschäfer dma-channel@480 { 119*1fe283e8SJ. Neuschäfer compatible = "fsl,eloplus-dma-channel"; 120*1fe283e8SJ. Neuschäfer reg = <0x480 0x80>; 121*1fe283e8SJ. Neuschäfer interrupts = <79 IRQ_TYPE_EDGE_FALLING 0 0>; 122*1fe283e8SJ. Neuschäfer }; 123*1fe283e8SJ. Neuschäfer }; 124*1fe283e8SJ. Neuschäfer 125*1fe283e8SJ. Neuschäfer... 126