145a24e40SAnimesh Agarwal# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 245a24e40SAnimesh Agarwal%YAML 1.2 345a24e40SAnimesh Agarwal--- 445a24e40SAnimesh Agarwal$id: http://devicetree.org/schemas/dma/fsl,imx-dma.yaml# 545a24e40SAnimesh Agarwal$schema: http://devicetree.org/meta-schemas/core.yaml# 645a24e40SAnimesh Agarwal 745a24e40SAnimesh Agarwaltitle: Freescale Direct Memory Access (DMA) Controller for i.MX 845a24e40SAnimesh Agarwal 945a24e40SAnimesh Agarwalmaintainers: 1045a24e40SAnimesh Agarwal - Animesh Agarwal <animeshagarwal28@gmail.com> 1145a24e40SAnimesh Agarwal 1245a24e40SAnimesh AgarwalallOf: 1345a24e40SAnimesh Agarwal - $ref: dma-controller.yaml# 1445a24e40SAnimesh Agarwal 1545a24e40SAnimesh Agarwalproperties: 1645a24e40SAnimesh Agarwal compatible: 1745a24e40SAnimesh Agarwal enum: 1845a24e40SAnimesh Agarwal - fsl,imx1-dma 1945a24e40SAnimesh Agarwal - fsl,imx21-dma 2045a24e40SAnimesh Agarwal - fsl,imx27-dma 2145a24e40SAnimesh Agarwal 2245a24e40SAnimesh Agarwal reg: 2345a24e40SAnimesh Agarwal maxItems: 1 2445a24e40SAnimesh Agarwal 2545a24e40SAnimesh Agarwal interrupts: 2645a24e40SAnimesh Agarwal items: 2745a24e40SAnimesh Agarwal - description: DMA complete interrupt 2845a24e40SAnimesh Agarwal - description: DMA Error interrupt 2945a24e40SAnimesh Agarwal minItems: 1 3045a24e40SAnimesh Agarwal 31*2ccf4822SFabio Estevam clocks: 32*2ccf4822SFabio Estevam maxItems: 2 33*2ccf4822SFabio Estevam 34*2ccf4822SFabio Estevam clock-names: 35*2ccf4822SFabio Estevam items: 36*2ccf4822SFabio Estevam - const: ipg 37*2ccf4822SFabio Estevam - const: ahb 38*2ccf4822SFabio Estevam 3945a24e40SAnimesh Agarwal "#dma-cells": 4045a24e40SAnimesh Agarwal const: 1 4145a24e40SAnimesh Agarwal 4245a24e40SAnimesh Agarwal dma-channels: 4345a24e40SAnimesh Agarwal const: 16 4445a24e40SAnimesh Agarwal 4545a24e40SAnimesh Agarwal dma-requests: 4645a24e40SAnimesh Agarwal description: Number of DMA requests supported. 4745a24e40SAnimesh Agarwal 4845a24e40SAnimesh Agarwalrequired: 4945a24e40SAnimesh Agarwal - compatible 5045a24e40SAnimesh Agarwal - reg 5145a24e40SAnimesh Agarwal - interrupts 5245a24e40SAnimesh Agarwal - "#dma-cells" 53*2ccf4822SFabio Estevam - clocks 54*2ccf4822SFabio Estevam - clock-names 5545a24e40SAnimesh Agarwal 5645a24e40SAnimesh AgarwaladditionalProperties: false 5745a24e40SAnimesh Agarwal 5845a24e40SAnimesh Agarwalexamples: 5945a24e40SAnimesh Agarwal - | 60*2ccf4822SFabio Estevam #include <dt-bindings/clock/imx27-clock.h> 61*2ccf4822SFabio Estevam 6245a24e40SAnimesh Agarwal dma-controller@10001000 { 6345a24e40SAnimesh Agarwal compatible = "fsl,imx27-dma"; 6445a24e40SAnimesh Agarwal reg = <0x10001000 0x1000>; 6545a24e40SAnimesh Agarwal interrupts = <32 33>; 6645a24e40SAnimesh Agarwal #dma-cells = <1>; 6745a24e40SAnimesh Agarwal dma-channels = <16>; 68*2ccf4822SFabio Estevam clocks = <&clks IMX27_CLK_DMA_IPG_GATE>, <&clks IMX27_CLK_DMA_AHB_GATE>; 69*2ccf4822SFabio Estevam clock-names = "ipg", "ahb"; 7045a24e40SAnimesh Agarwal }; 71