xref: /linux/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml (revision eb01fe7abbe2d0b38824d2a93fdb4cc3eaf2ccc1) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A64 DMA Controller
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13allOf:
14  - $ref: dma-controller.yaml#
15
16properties:
17  "#dma-cells":
18    const: 1
19    description: The cell is the request line number.
20
21  compatible:
22    oneOf:
23      - enum:
24          - allwinner,sun20i-d1-dma
25          - allwinner,sun50i-a64-dma
26          - allwinner,sun50i-a100-dma
27          - allwinner,sun50i-h6-dma
28      - items:
29          - const: allwinner,sun8i-r40-dma
30          - const: allwinner,sun50i-a64-dma
31      - items:
32          - const: allwinner,sun50i-h616-dma
33          - const: allwinner,sun50i-a100-dma
34
35  reg:
36    maxItems: 1
37
38  interrupts:
39    maxItems: 1
40
41  clocks:
42    minItems: 1
43    maxItems: 2
44
45  clock-names:
46    items:
47      - const: bus
48      - const: mbus
49
50  resets:
51    maxItems: 1
52
53required:
54  - "#dma-cells"
55  - compatible
56  - reg
57  - interrupts
58  - clocks
59  - resets
60  - dma-channels
61
62if:
63  properties:
64    compatible:
65      contains:
66        enum:
67          - allwinner,sun20i-d1-dma
68          - allwinner,sun50i-a100-dma
69          - allwinner,sun50i-h6-dma
70
71then:
72  properties:
73    clocks:
74      minItems: 2
75
76  required:
77    - clock-names
78
79else:
80  properties:
81    clocks:
82      maxItems: 1
83
84unevaluatedProperties: false
85
86examples:
87  - |
88    dma: dma-controller@1c02000 {
89        compatible = "allwinner,sun50i-a64-dma";
90        reg = <0x01c02000 0x1000>;
91        interrupts = <0 50 4>;
92        clocks = <&ccu 30>;
93        dma-channels = <8>;
94        dma-requests = <27>;
95        resets = <&ccu 7>;
96        #dma-cells = <1>;
97    };
98
99...
100