1*efdbd734SRob HerringTexas Instruments OMAP Display Subsystem 2*efdbd734SRob Herring======================================== 3*efdbd734SRob Herring 4*efdbd734SRob HerringGeneric Description 5*efdbd734SRob Herring------------------- 6*efdbd734SRob Herring 7*efdbd734SRob HerringThis document is a generic description of the OMAP Display Subsystem bindings. 8*efdbd734SRob HerringBinding details for each OMAP SoC version are described in respective binding 9*efdbd734SRob Herringdocumentation. 10*efdbd734SRob Herring 11*efdbd734SRob HerringThe OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and 12*efdbd734SRob Herringa number of encoder modules. All DSS versions contain DSS Core and DISPC, but 13*efdbd734SRob Herringthe encoder modules vary. 14*efdbd734SRob Herring 15*efdbd734SRob HerringThe DSS Core is the parent of the other DSS modules, and manages clock routing, 16*efdbd734SRob Herringintegration to the SoC, etc. 17*efdbd734SRob Herring 18*efdbd734SRob HerringDISPC is the display controller, which reads pixels from the memory and outputs 19*efdbd734SRob Herringa RGB pixel stream to encoders. 20*efdbd734SRob Herring 21*efdbd734SRob HerringThe encoder modules encode the received RGB pixel stream to a video output like 22*efdbd734SRob HerringHDMI, MIPI DPI, etc. 23*efdbd734SRob Herring 24*efdbd734SRob HerringVideo Ports 25*efdbd734SRob Herring----------- 26*efdbd734SRob Herring 27*efdbd734SRob HerringThe DSS Core and the encoders have video port outputs. The structure of the 28*efdbd734SRob Herringvideo ports is described in Documentation/devicetree/bindings/graph.txt, 29*efdbd734SRob Herringand the properties for the ports and endpoints for each encoder are 30*efdbd734SRob Herringdescribed in the SoC's DSS binding documentation. 31*efdbd734SRob Herring 32*efdbd734SRob HerringThe video ports are used to describe the connections to external hardware, like 33*efdbd734SRob Herringpanels or external encoders. 34*efdbd734SRob Herring 35*efdbd734SRob HerringAliases 36*efdbd734SRob Herring------- 37*efdbd734SRob Herring 38*efdbd734SRob HerringThe board dts file may define aliases for displays to assign "displayX" style 39*efdbd734SRob Herringname for each display. If no aliases are defined, a semi-random number is used 40*efdbd734SRob Herringfor the display. 41*efdbd734SRob Herring 42*efdbd734SRob HerringExample 43*efdbd734SRob Herring------- 44*efdbd734SRob Herring 45*efdbd734SRob HerringA shortened example of the DSS description for OMAP4, with non-relevant parts 46*efdbd734SRob Herringremoved, defined in omap4.dtsi: 47*efdbd734SRob Herring 48*efdbd734SRob Herringdss: dss@58000000 { 49*efdbd734SRob Herring compatible = "ti,omap4-dss"; 50*efdbd734SRob Herring reg = <0x58000000 0x80>; 51*efdbd734SRob Herring status = "disabled"; 52*efdbd734SRob Herring ti,hwmods = "dss_core"; 53*efdbd734SRob Herring clocks = <&dss_dss_clk>; 54*efdbd734SRob Herring clock-names = "fck"; 55*efdbd734SRob Herring #address-cells = <1>; 56*efdbd734SRob Herring #size-cells = <1>; 57*efdbd734SRob Herring ranges; 58*efdbd734SRob Herring 59*efdbd734SRob Herring dispc@58001000 { 60*efdbd734SRob Herring compatible = "ti,omap4-dispc"; 61*efdbd734SRob Herring reg = <0x58001000 0x1000>; 62*efdbd734SRob Herring interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 63*efdbd734SRob Herring ti,hwmods = "dss_dispc"; 64*efdbd734SRob Herring clocks = <&dss_dss_clk>; 65*efdbd734SRob Herring clock-names = "fck"; 66*efdbd734SRob Herring }; 67*efdbd734SRob Herring 68*efdbd734SRob Herring hdmi: encoder@58006000 { 69*efdbd734SRob Herring compatible = "ti,omap4-hdmi"; 70*efdbd734SRob Herring reg = <0x58006000 0x200>, 71*efdbd734SRob Herring <0x58006200 0x100>, 72*efdbd734SRob Herring <0x58006300 0x100>, 73*efdbd734SRob Herring <0x58006400 0x1000>; 74*efdbd734SRob Herring reg-names = "wp", "pll", "phy", "core"; 75*efdbd734SRob Herring interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 76*efdbd734SRob Herring status = "disabled"; 77*efdbd734SRob Herring ti,hwmods = "dss_hdmi"; 78*efdbd734SRob Herring clocks = <&dss_48mhz_clk>, <&dss_sys_clk>; 79*efdbd734SRob Herring clock-names = "fck", "sys_clk"; 80*efdbd734SRob Herring }; 81*efdbd734SRob Herring}; 82*efdbd734SRob Herring 83*efdbd734SRob HerringA shortened example of the board description for OMAP4 Panda board, defined in 84*efdbd734SRob Herringomap4-panda.dts. 85*efdbd734SRob Herring 86*efdbd734SRob HerringThe Panda board has a DVI and a HDMI connector, and the board contains a TFP410 87*efdbd734SRob Herringchip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level 88*efdbd734SRob Herringshifter). The video pipelines for the connectors are formed as follows: 89*efdbd734SRob Herring 90*efdbd734SRob HerringDSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector 91*efdbd734SRob HerringOMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector 92*efdbd734SRob Herring 93*efdbd734SRob Herring/ { 94*efdbd734SRob Herring aliases { 95*efdbd734SRob Herring display0 = &dvi0; 96*efdbd734SRob Herring display1 = &hdmi0; 97*efdbd734SRob Herring }; 98*efdbd734SRob Herring 99*efdbd734SRob Herring tfp410: encoder@0 { 100*efdbd734SRob Herring compatible = "ti,tfp410"; 101*efdbd734SRob Herring gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */ 102*efdbd734SRob Herring 103*efdbd734SRob Herring pinctrl-names = "default"; 104*efdbd734SRob Herring pinctrl-0 = <&tfp410_pins>; 105*efdbd734SRob Herring 106*efdbd734SRob Herring ports { 107*efdbd734SRob Herring #address-cells = <1>; 108*efdbd734SRob Herring #size-cells = <0>; 109*efdbd734SRob Herring 110*efdbd734SRob Herring port@0 { 111*efdbd734SRob Herring reg = <0>; 112*efdbd734SRob Herring 113*efdbd734SRob Herring tfp410_in: endpoint@0 { 114*efdbd734SRob Herring remote-endpoint = <&dpi_out>; 115*efdbd734SRob Herring }; 116*efdbd734SRob Herring }; 117*efdbd734SRob Herring 118*efdbd734SRob Herring port@1 { 119*efdbd734SRob Herring reg = <1>; 120*efdbd734SRob Herring 121*efdbd734SRob Herring tfp410_out: endpoint@0 { 122*efdbd734SRob Herring remote-endpoint = <&dvi_connector_in>; 123*efdbd734SRob Herring }; 124*efdbd734SRob Herring }; 125*efdbd734SRob Herring }; 126*efdbd734SRob Herring }; 127*efdbd734SRob Herring 128*efdbd734SRob Herring dvi0: connector@0 { 129*efdbd734SRob Herring compatible = "dvi-connector"; 130*efdbd734SRob Herring label = "dvi"; 131*efdbd734SRob Herring 132*efdbd734SRob Herring i2c-bus = <&i2c3>; 133*efdbd734SRob Herring 134*efdbd734SRob Herring port { 135*efdbd734SRob Herring dvi_connector_in: endpoint { 136*efdbd734SRob Herring remote-endpoint = <&tfp410_out>; 137*efdbd734SRob Herring }; 138*efdbd734SRob Herring }; 139*efdbd734SRob Herring }; 140*efdbd734SRob Herring 141*efdbd734SRob Herring tpd12s015: encoder@1 { 142*efdbd734SRob Herring compatible = "ti,tpd12s015"; 143*efdbd734SRob Herring 144*efdbd734SRob Herring pinctrl-names = "default"; 145*efdbd734SRob Herring pinctrl-0 = <&tpd12s015_pins>; 146*efdbd734SRob Herring 147*efdbd734SRob Herring gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */ 148*efdbd734SRob Herring <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */ 149*efdbd734SRob Herring <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */ 150*efdbd734SRob Herring 151*efdbd734SRob Herring ports { 152*efdbd734SRob Herring #address-cells = <1>; 153*efdbd734SRob Herring #size-cells = <0>; 154*efdbd734SRob Herring 155*efdbd734SRob Herring port@0 { 156*efdbd734SRob Herring reg = <0>; 157*efdbd734SRob Herring 158*efdbd734SRob Herring tpd12s015_in: endpoint@0 { 159*efdbd734SRob Herring remote-endpoint = <&hdmi_out>; 160*efdbd734SRob Herring }; 161*efdbd734SRob Herring }; 162*efdbd734SRob Herring 163*efdbd734SRob Herring port@1 { 164*efdbd734SRob Herring reg = <1>; 165*efdbd734SRob Herring 166*efdbd734SRob Herring tpd12s015_out: endpoint@0 { 167*efdbd734SRob Herring remote-endpoint = <&hdmi_connector_in>; 168*efdbd734SRob Herring }; 169*efdbd734SRob Herring }; 170*efdbd734SRob Herring }; 171*efdbd734SRob Herring }; 172*efdbd734SRob Herring 173*efdbd734SRob Herring hdmi0: connector@1 { 174*efdbd734SRob Herring compatible = "hdmi-connector"; 175*efdbd734SRob Herring label = "hdmi"; 176*efdbd734SRob Herring 177*efdbd734SRob Herring port { 178*efdbd734SRob Herring hdmi_connector_in: endpoint { 179*efdbd734SRob Herring remote-endpoint = <&tpd12s015_out>; 180*efdbd734SRob Herring }; 181*efdbd734SRob Herring }; 182*efdbd734SRob Herring }; 183*efdbd734SRob Herring}; 184*efdbd734SRob Herring 185*efdbd734SRob Herring&dss { 186*efdbd734SRob Herring status = "ok"; 187*efdbd734SRob Herring 188*efdbd734SRob Herring pinctrl-names = "default"; 189*efdbd734SRob Herring pinctrl-0 = <&dss_dpi_pins>; 190*efdbd734SRob Herring 191*efdbd734SRob Herring port { 192*efdbd734SRob Herring dpi_out: endpoint { 193*efdbd734SRob Herring remote-endpoint = <&tfp410_in>; 194*efdbd734SRob Herring data-lines = <24>; 195*efdbd734SRob Herring }; 196*efdbd734SRob Herring }; 197*efdbd734SRob Herring}; 198*efdbd734SRob Herring 199*efdbd734SRob Herring&hdmi { 200*efdbd734SRob Herring status = "ok"; 201*efdbd734SRob Herring vdda-supply = <&vdac>; 202*efdbd734SRob Herring 203*efdbd734SRob Herring pinctrl-names = "default"; 204*efdbd734SRob Herring pinctrl-0 = <&dss_hdmi_pins>; 205*efdbd734SRob Herring 206*efdbd734SRob Herring port { 207*efdbd734SRob Herring hdmi_out: endpoint { 208*efdbd734SRob Herring remote-endpoint = <&tpd12s015_in>; 209*efdbd734SRob Herring }; 210*efdbd734SRob Herring }; 211*efdbd734SRob Herring}; 212