1*7e3d507aSLuca Ceresoli# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*7e3d507aSLuca Ceresoli%YAML 1.2 3*7e3d507aSLuca Ceresoli--- 4*7e3d507aSLuca Ceresoli$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml# 5*7e3d507aSLuca Ceresoli$schema: http://devicetree.org/meta-schemas/core.yaml# 6*7e3d507aSLuca Ceresoli 7*7e3d507aSLuca Ceresolititle: NVIDIA Tegra VIP (parallel video capture) controller 8*7e3d507aSLuca Ceresoli 9*7e3d507aSLuca Ceresolimaintainers: 10*7e3d507aSLuca Ceresoli - Luca Ceresoli <luca.ceresoli@bootlin.com> 11*7e3d507aSLuca Ceresoli 12*7e3d507aSLuca Ceresoliproperties: 13*7e3d507aSLuca Ceresoli compatible: 14*7e3d507aSLuca Ceresoli enum: 15*7e3d507aSLuca Ceresoli - nvidia,tegra20-vip 16*7e3d507aSLuca Ceresoli 17*7e3d507aSLuca Ceresoli ports: 18*7e3d507aSLuca Ceresoli $ref: /schemas/graph.yaml#/properties/ports 19*7e3d507aSLuca Ceresoli 20*7e3d507aSLuca Ceresoli properties: 21*7e3d507aSLuca Ceresoli port@0: 22*7e3d507aSLuca Ceresoli $ref: /schemas/graph.yaml#/properties/port 23*7e3d507aSLuca Ceresoli description: 24*7e3d507aSLuca Ceresoli Port receiving the video stream from the sensor 25*7e3d507aSLuca Ceresoli 26*7e3d507aSLuca Ceresoli port@1: 27*7e3d507aSLuca Ceresoli $ref: /schemas/graph.yaml#/properties/port 28*7e3d507aSLuca Ceresoli description: 29*7e3d507aSLuca Ceresoli Port sending the video stream to the VI 30*7e3d507aSLuca Ceresoli 31*7e3d507aSLuca Ceresoli required: 32*7e3d507aSLuca Ceresoli - port@0 33*7e3d507aSLuca Ceresoli - port@1 34*7e3d507aSLuca Ceresoli 35*7e3d507aSLuca CeresoliunevaluatedProperties: false 36*7e3d507aSLuca Ceresoli 37*7e3d507aSLuca Ceresolirequired: 38*7e3d507aSLuca Ceresoli - compatible 39*7e3d507aSLuca Ceresoli - ports 40*7e3d507aSLuca Ceresoli 41*7e3d507aSLuca Ceresoli# see nvidia,tegra20-vi.yaml for an example 42