xref: /linux/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml (revision a1c3be890440a1769ed6f822376a3e3ab0d42994)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 lcd-tft display controller
8
9maintainers:
10  - Philippe Cornu <philippe.cornu@st.com>
11  - Yannick Fertre <yannick.fertre@st.com>
12
13properties:
14  compatible:
15    const: st,stm32-ltdc
16
17  reg:
18    maxItems: 1
19
20  interrupts:
21    items:
22      - description: events interrupt line.
23      - description: errors interrupt line.
24    minItems: 1
25    maxItems: 2
26
27  clocks:
28    maxItems: 1
29
30  clock-names:
31    items:
32      - const: lcd
33
34  resets:
35    maxItems: 1
36
37  port:
38    $ref: /schemas/graph.yaml#/properties/port
39    description: |
40      Video port for DPI RGB output.
41      ltdc has one video port with up to 2 endpoints:
42      - for external dpi rgb panel or bridge, using gpios.
43      - for internal dpi input of the MIPI DSI host controller.
44      Note: These 2 endpoints cannot be activated simultaneously.
45
46required:
47  - compatible
48  - reg
49  - interrupts
50  - clocks
51  - clock-names
52  - resets
53  - port
54
55additionalProperties: false
56
57examples:
58  - |
59    #include <dt-bindings/interrupt-controller/arm-gic.h>
60    #include <dt-bindings/clock/stm32mp1-clks.h>
61    #include <dt-bindings/reset/stm32mp1-resets.h>
62    ltdc: display-controller@40016800 {
63        compatible = "st,stm32-ltdc";
64        reg = <0x5a001000 0x400>;
65        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
66                     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
67        clocks = <&rcc LTDC_PX>;
68        clock-names = "lcd";
69        resets = <&rcc LTDC_R>;
70
71        port {
72             ltdc_out_dsi: endpoint {
73                     remote-endpoint = <&dsi_in>;
74             };
75        };
76    };
77
78...
79
80