xref: /linux/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml (revision 02680c23d7b3febe45ea3d4f9818c2b2dc89020a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 DSI host controller
8
9maintainers:
10  - Philippe Cornu <philippe.cornu@st.com>
11  - Yannick Fertre <yannick.fertre@st.com>
12
13description:
14  The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
15
16allOf:
17  - $ref: dsi-controller.yaml#
18
19properties:
20  compatible:
21    const: st,stm32-dsi
22
23  reg:
24    maxItems: 1
25
26  clocks:
27    items:
28      - description: Module Clock
29      - description: DSI bus clock
30      - description: Pixel clock
31    minItems: 2
32    maxItems: 3
33
34  clock-names:
35    items:
36      - const: pclk
37      - const: ref
38      - const: px_clk
39    minItems: 2
40    maxItems: 3
41
42  resets:
43    maxItems: 1
44
45  reset-names:
46    items:
47      - const: apb
48
49  phy-dsi-supply:
50    description:
51      Phandle of the regulator that provides the supply voltage.
52
53  ports:
54    $ref: /schemas/graph.yaml#/properties/ports
55
56    properties:
57      port@0:
58        $ref: /schemas/graph.yaml#/properties/port
59        description:
60          DSI input port node, connected to the ltdc rgb output port.
61
62      port@1:
63        $ref: /schemas/graph.yaml#/properties/port
64        description:
65          DSI output port node, connected to a panel or a bridge input port"
66
67required:
68  - "#address-cells"
69  - "#size-cells"
70  - compatible
71  - reg
72  - clocks
73  - clock-names
74  - ports
75
76unevaluatedProperties: false
77
78examples:
79  - |
80    #include <dt-bindings/interrupt-controller/arm-gic.h>
81    #include <dt-bindings/clock/stm32mp1-clks.h>
82    #include <dt-bindings/reset/stm32mp1-resets.h>
83    #include <dt-bindings/gpio/gpio.h>
84    dsi: dsi@5a000000 {
85        compatible = "st,stm32-dsi";
86        reg = <0x5a000000 0x800>;
87        clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
88        clock-names = "pclk", "ref", "px_clk";
89        resets = <&rcc DSI_R>;
90        reset-names = "apb";
91        phy-dsi-supply = <&reg18>;
92
93        #address-cells = <1>;
94        #size-cells = <0>;
95
96        ports {
97              #address-cells = <1>;
98              #size-cells = <0>;
99
100              port@0 {
101                    reg = <0>;
102                    dsi_in: endpoint {
103                        remote-endpoint = <&ltdc_ep1_out>;
104                    };
105              };
106
107              port@1 {
108                    reg = <1>;
109                    dsi_out: endpoint {
110                        remote-endpoint = <&panel_in>;
111                    };
112              };
113        };
114
115        panel-dsi@0 {
116              compatible = "orisetech,otm8009a";
117              reg = <0>;
118              reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
119              power-supply = <&v3v3>;
120
121              port {
122                    panel_in: endpoint {
123                        remote-endpoint = <&dsi_out>;
124                    };
125              };
126        };
127    };
128
129...
130
131