12295bbd3SKevin Tang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22295bbd3SKevin Tang%YAML 1.2 32295bbd3SKevin Tang--- 42295bbd3SKevin Tang$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml# 52295bbd3SKevin Tang$schema: http://devicetree.org/meta-schemas/core.yaml# 62295bbd3SKevin Tang 72295bbd3SKevin Tangtitle: Unisoc MIPI DSI Controller 82295bbd3SKevin Tang 92295bbd3SKevin Tangmaintainers: 102295bbd3SKevin Tang - Kevin Tang <kevin.tang@unisoc.com> 112295bbd3SKevin Tang 122295bbd3SKevin Tangproperties: 132295bbd3SKevin Tang compatible: 142295bbd3SKevin Tang const: sprd,sharkl3-dsi-host 152295bbd3SKevin Tang 162295bbd3SKevin Tang reg: 172295bbd3SKevin Tang maxItems: 1 182295bbd3SKevin Tang 192295bbd3SKevin Tang interrupts: 202295bbd3SKevin Tang maxItems: 2 212295bbd3SKevin Tang 222295bbd3SKevin Tang clocks: 23*2558df8cSKrzysztof Kozlowski maxItems: 1 242295bbd3SKevin Tang 252295bbd3SKevin Tang clock-names: 262295bbd3SKevin Tang items: 272295bbd3SKevin Tang - const: clk_src_96m 282295bbd3SKevin Tang 292295bbd3SKevin Tang power-domains: 302295bbd3SKevin Tang maxItems: 1 312295bbd3SKevin Tang 322295bbd3SKevin Tang ports: 332295bbd3SKevin Tang type: object 342295bbd3SKevin Tang 352295bbd3SKevin Tang properties: 362295bbd3SKevin Tang "#address-cells": 372295bbd3SKevin Tang const: 1 382295bbd3SKevin Tang 392295bbd3SKevin Tang "#size-cells": 402295bbd3SKevin Tang const: 0 412295bbd3SKevin Tang 422295bbd3SKevin Tang port@0: 432295bbd3SKevin Tang type: object 442295bbd3SKevin Tang description: 452295bbd3SKevin Tang A port node with endpoint definitions as defined in 462295bbd3SKevin Tang Documentation/devicetree/bindings/media/video-interfaces.txt. 472295bbd3SKevin Tang That port should be the input endpoint, usually coming from 482295bbd3SKevin Tang the associated DPU. 492295bbd3SKevin Tang 502295bbd3SKevin Tang required: 512295bbd3SKevin Tang - "#address-cells" 522295bbd3SKevin Tang - "#size-cells" 532295bbd3SKevin Tang - port@0 542295bbd3SKevin Tang 552295bbd3SKevin Tang additionalProperties: false 562295bbd3SKevin Tang 572295bbd3SKevin Tangrequired: 582295bbd3SKevin Tang - compatible 592295bbd3SKevin Tang - reg 602295bbd3SKevin Tang - interrupts 612295bbd3SKevin Tang - clocks 622295bbd3SKevin Tang - clock-names 632295bbd3SKevin Tang - ports 642295bbd3SKevin Tang 652295bbd3SKevin TangadditionalProperties: false 662295bbd3SKevin Tang 672295bbd3SKevin Tangexamples: 682295bbd3SKevin Tang - | 692295bbd3SKevin Tang #include <dt-bindings/interrupt-controller/arm-gic.h> 702295bbd3SKevin Tang #include <dt-bindings/clock/sprd,sc9860-clk.h> 712295bbd3SKevin Tang dsi: dsi@63100000 { 722295bbd3SKevin Tang compatible = "sprd,sharkl3-dsi-host"; 732295bbd3SKevin Tang reg = <0x63100000 0x1000>; 742295bbd3SKevin Tang interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 752295bbd3SKevin Tang <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 762295bbd3SKevin Tang clock-names = "clk_src_96m"; 772295bbd3SKevin Tang clocks = <&pll CLK_TWPLL_96M>; 782295bbd3SKevin Tang ports { 792295bbd3SKevin Tang #address-cells = <1>; 802295bbd3SKevin Tang #size-cells = <0>; 812295bbd3SKevin Tang port@0 { 822295bbd3SKevin Tang reg = <0>; 832295bbd3SKevin Tang dsi_in: endpoint { 842295bbd3SKevin Tang remote-endpoint = <&dpu_out>; 852295bbd3SKevin Tang }; 862295bbd3SKevin Tang }; 872295bbd3SKevin Tang }; 882295bbd3SKevin Tang }; 89