1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip specific extensions to the Synopsys Designware MIPI DSI 8 9maintainers: 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13properties: 14 compatible: 15 items: 16 - enum: 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3288-mipi-dsi 19 - rockchip,rk3399-mipi-dsi 20 - rockchip,rk3568-mipi-dsi 21 - rockchip,rv1126-mipi-dsi 22 - const: snps,dw-mipi-dsi 23 24 interrupts: 25 maxItems: 1 26 27 clocks: 28 minItems: 1 29 maxItems: 4 30 31 clock-names: 32 oneOf: 33 - minItems: 2 34 items: 35 - const: ref 36 - const: pclk 37 - const: phy_cfg 38 - const: grf 39 - const: pclk 40 41 rockchip,grf: 42 $ref: /schemas/types.yaml#/definitions/phandle 43 description: 44 This SoC uses GRF regs to switch between vopl/vopb. 45 46 phys: 47 maxItems: 1 48 49 phy-names: 50 const: dphy 51 52 "#phy-cells": 53 const: 0 54 description: 55 Defined when in use as ISP phy. 56 57 power-domains: 58 maxItems: 1 59 60 "#address-cells": 61 const: 1 62 63 "#size-cells": 64 const: 0 65 66required: 67 - compatible 68 - clocks 69 - clock-names 70 - rockchip,grf 71 72allOf: 73 - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml# 74 - if: 75 properties: 76 compatible: 77 contains: 78 enum: 79 - rockchip,px30-mipi-dsi 80 - rockchip,rk3568-mipi-dsi 81 - rockchip,rv1126-mipi-dsi 82 83 then: 84 properties: 85 clocks: 86 maxItems: 1 87 88 clock-names: 89 maxItems: 1 90 91 required: 92 - phys 93 - phy-names 94 95 - if: 96 properties: 97 compatible: 98 contains: 99 const: rockchip,rk3288-mipi-dsi 100 101 then: 102 properties: 103 clocks: 104 maxItems: 2 105 106 clock-names: 107 maxItems: 2 108 109 - if: 110 properties: 111 compatible: 112 contains: 113 const: rockchip,rk3399-mipi-dsi 114 115 then: 116 properties: 117 clocks: 118 minItems: 4 119 120 clock-names: 121 minItems: 4 122 123unevaluatedProperties: false 124 125examples: 126 - | 127 #include <dt-bindings/clock/rk3288-cru.h> 128 #include <dt-bindings/interrupt-controller/arm-gic.h> 129 #include <dt-bindings/interrupt-controller/irq.h> 130 131 mipi_dsi: dsi@ff960000 { 132 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; 133 reg = <0xff960000 0x4000>; 134 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 135 clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; 136 clock-names = "ref", "pclk"; 137 resets = <&cru SRST_MIPIDSI0>; 138 reset-names = "apb"; 139 rockchip,grf = <&grf>; 140 141 ports { 142 #address-cells = <1>; 143 #size-cells = <0>; 144 145 mipi_in: port@0 { 146 reg = <0>; 147 #address-cells = <1>; 148 #size-cells = <0>; 149 150 mipi_in_vopb: endpoint@0 { 151 reg = <0>; 152 remote-endpoint = <&vopb_out_mipi>; 153 }; 154 mipi_in_vopl: endpoint@1 { 155 reg = <1>; 156 remote-endpoint = <&vopl_out_mipi>; 157 }; 158 }; 159 160 mipi_out: port@1 { 161 reg = <1>; 162 163 mipi_out_panel: endpoint { 164 remote-endpoint = <&panel_in_mipi>; 165 }; 166 }; 167 }; 168 }; 169