xref: /linux/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml (revision f9bff0e31881d03badf191d3b0005839391f5f2b) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip specific extensions to the Synopsys Designware MIPI DSI
8
9maintainers:
10  - Sandy Huang <hjc@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12
13properties:
14  compatible:
15    items:
16      - enum:
17          - rockchip,px30-mipi-dsi
18          - rockchip,rk3288-mipi-dsi
19          - rockchip,rk3399-mipi-dsi
20          - rockchip,rk3568-mipi-dsi
21      - const: snps,dw-mipi-dsi
22
23  interrupts:
24    maxItems: 1
25
26  clocks:
27    minItems: 1
28    maxItems: 4
29
30  clock-names:
31    oneOf:
32      - minItems: 2
33        items:
34          - const: ref
35          - const: pclk
36          - const: phy_cfg
37          - const: grf
38      - const: pclk
39
40  rockchip,grf:
41    $ref: /schemas/types.yaml#/definitions/phandle
42    description:
43      This SoC uses GRF regs to switch between vopl/vopb.
44
45  phys:
46    maxItems: 1
47
48  phy-names:
49    const: dphy
50
51  "#phy-cells":
52    const: 0
53    description:
54      Defined when in use as ISP phy.
55
56  power-domains:
57    maxItems: 1
58
59  "#address-cells":
60    const: 1
61
62  "#size-cells":
63    const: 0
64
65required:
66  - compatible
67  - clocks
68  - clock-names
69  - rockchip,grf
70
71allOf:
72  - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml#
73  - if:
74      properties:
75        compatible:
76          contains:
77            enum:
78              - rockchip,px30-mipi-dsi
79              - rockchip,rk3568-mipi-dsi
80
81    then:
82      properties:
83        clocks:
84          maxItems: 1
85
86        clock-names:
87          maxItems: 1
88
89      required:
90        - phys
91        - phy-names
92
93  - if:
94      properties:
95        compatible:
96          contains:
97            const: rockchip,rk3288-mipi-dsi
98
99    then:
100      properties:
101        clocks:
102          maxItems: 2
103
104        clock-names:
105          maxItems: 2
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            const: rockchip,rk3399-mipi-dsi
112
113    then:
114      properties:
115        clocks:
116          minItems: 4
117
118        clock-names:
119          minItems: 4
120
121unevaluatedProperties: false
122
123examples:
124  - |
125    #include <dt-bindings/clock/rk3288-cru.h>
126    #include <dt-bindings/interrupt-controller/arm-gic.h>
127    #include <dt-bindings/interrupt-controller/irq.h>
128
129    mipi_dsi: dsi@ff960000 {
130      compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
131      reg = <0xff960000 0x4000>;
132      interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
133      clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
134      clock-names = "ref", "pclk";
135      resets = <&cru SRST_MIPIDSI0>;
136      reset-names = "apb";
137      rockchip,grf = <&grf>;
138
139      ports {
140        #address-cells = <1>;
141        #size-cells = <0>;
142
143        mipi_in: port@0 {
144          reg = <0>;
145          #address-cells = <1>;
146          #size-cells = <0>;
147
148          mipi_in_vopb: endpoint@0 {
149            reg = <0>;
150            remote-endpoint = <&vopb_out_mipi>;
151          };
152          mipi_in_vopl: endpoint@1 {
153            reg = <1>;
154            remote-endpoint = <&vopl_out_mipi>;
155          };
156        };
157
158        mipi_out: port@1 {
159          reg = <1>;
160
161          mipi_out_panel: endpoint {
162            remote-endpoint = <&panel_in_mipi>;
163          };
164        };
165      };
166    };
167