xref: /linux/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml (revision 3f41368fbfe1b3d5922d317fe1a0a0cab6846802) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip DWC HDMI TX Encoder
8
9maintainers:
10  - Mark Yao <markyao0591@gmail.com>
11
12description: |
13  The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
14  with a companion PHY IP.
15
16allOf:
17  - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18  - $ref: /schemas/sound/dai-common.yaml#
19
20properties:
21  compatible:
22    enum:
23      - rockchip,rk3228-dw-hdmi
24      - rockchip,rk3288-dw-hdmi
25      - rockchip,rk3328-dw-hdmi
26      - rockchip,rk3399-dw-hdmi
27      - rockchip,rk3568-dw-hdmi
28
29  reg-io-width:
30    const: 4
31
32  avdd-0v9-supply:
33    description:
34      A 0.9V supply that powers up the SoC internal circuitry. The actual pin name
35      varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes
36      HDMI_AVDD_1V0.
37
38  avdd-1v8-supply:
39    description:
40      A 1.8V supply that powers up the SoC internal circuitry. The pin name on the
41      SoC usually is HDMI_TX_AVDD_1V8.
42
43  clocks:
44    minItems: 2
45    items:
46      - {}
47      - {}
48      # The next three clocks are all optional, but shall be specified in this
49      # order when present.
50      - description: The HDMI CEC controller main clock
51      - description: Power for GRF IO
52      - description: External clock for some HDMI PHY (old clock name, deprecated)
53      - description: External clock for some HDMI PHY (new name)
54
55  clock-names:
56    minItems: 2
57    items:
58      - {}
59      - {}
60      - enum:
61          - cec
62          - grf
63          - vpll
64          - ref
65      - enum:
66          - grf
67          - vpll
68          - ref
69      - enum:
70          - vpll
71          - ref
72
73  ddc-i2c-bus:
74    $ref: /schemas/types.yaml#/definitions/phandle
75    description:
76      The HDMI DDC bus can be connected to either a system I2C master or the
77      functionally-reduced I2C master contained in the DWC HDMI. When connected
78      to a system I2C master this property contains a phandle to that I2C
79      master controller.
80
81  phys:
82    maxItems: 1
83    description: The HDMI PHY
84
85  phy-names:
86    const: hdmi
87
88  pinctrl-names:
89    description:
90      The unwedge pinctrl entry shall drive the DDC SDA line low. This is
91      intended to work around a hardware errata that can cause the DDC I2C
92      bus to be wedged.
93    minItems: 1
94    items:
95      - const: default
96      - const: unwedge
97
98  power-domains:
99    maxItems: 1
100
101  ports:
102    $ref: /schemas/graph.yaml#/properties/ports
103
104    properties:
105      port@0:
106        $ref: /schemas/graph.yaml#/properties/port
107        description: Input of the DWC HDMI TX
108        properties:
109          endpoint:
110            description: Connection to the VOP
111          endpoint@0:
112            description: Connection to the VOPB
113          endpoint@1:
114            description: Connection to the VOPL
115      port@1:
116        $ref: /schemas/graph.yaml#/properties/port
117        description: Output of the DWC HDMI TX
118
119    required:
120      - port@0
121      - port@1
122
123  rockchip,grf:
124    $ref: /schemas/types.yaml#/definitions/phandle
125    description:
126      phandle to the GRF to mux vopl/vopb.
127
128  "#sound-dai-cells":
129    const: 0
130
131required:
132  - compatible
133  - reg
134  - reg-io-width
135  - clocks
136  - clock-names
137  - interrupts
138  - ports
139  - rockchip,grf
140
141unevaluatedProperties: false
142
143examples:
144  - |
145    #include <dt-bindings/clock/rk3288-cru.h>
146    #include <dt-bindings/interrupt-controller/arm-gic.h>
147    #include <dt-bindings/interrupt-controller/irq.h>
148    #include <dt-bindings/power/rk3288-power.h>
149
150    hdmi: hdmi@ff980000 {
151        compatible = "rockchip,rk3288-dw-hdmi";
152        reg = <0xff980000 0x20000>;
153        reg-io-width = <4>;
154        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
155        clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
156        clock-names = "iahb", "isfr";
157        ddc-i2c-bus = <&i2c5>;
158        power-domains = <&power RK3288_PD_VIO>;
159        rockchip,grf = <&grf>;
160        #sound-dai-cells = <0>;
161
162        ports {
163            #address-cells = <1>;
164            #size-cells = <0>;
165
166            port@0 {
167                reg = <0>;
168                #address-cells = <1>;
169                #size-cells = <0>;
170
171                hdmi_in_vopb: endpoint@0 {
172                    reg = <0>;
173                    remote-endpoint = <&vopb_out_hdmi>;
174                };
175
176                hdmi_in_vopl: endpoint@1 {
177                    reg = <1>;
178                    remote-endpoint = <&vopl_out_hdmi>;
179                };
180            };
181
182            port@1 {
183                reg = <1>;
184
185                hdmi_out_con: endpoint {
186                    remote-endpoint = <&hdmi_con_in>;
187                };
188            };
189        };
190    };
191
192...
193