xref: /linux/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,sm8150-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8150 Display DPU
8
9maintainers:
10  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    enum:
17      - qcom,sm8150-dpu
18      - qcom,sm8250-dpu
19
20  reg:
21    items:
22      - description: Address offset and size for mdp register set
23      - description: Address offset and size for vbif register set
24
25  reg-names:
26    items:
27      - const: mdp
28      - const: vbif
29
30  clocks:
31    items:
32      - description: Display ahb clock
33      - description: Display hf axi clock
34      - description: Display core clock
35      - description: Display vsync clock
36
37  clock-names:
38    items:
39      - const: iface
40      - const: bus
41      - const: core
42      - const: vsync
43
44unevaluatedProperties: false
45
46examples:
47  - |
48    #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
49    #include <dt-bindings/clock/qcom,gcc-sm8150.h>
50    #include <dt-bindings/interrupt-controller/arm-gic.h>
51    #include <dt-bindings/interconnect/qcom,sm8150.h>
52    #include <dt-bindings/power/qcom-rpmpd.h>
53
54    display-controller@ae01000 {
55        compatible = "qcom,sm8150-dpu";
56        reg = <0x0ae01000 0x8f000>,
57              <0x0aeb0000 0x2008>;
58        reg-names = "mdp", "vbif";
59
60        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
61                 <&gcc GCC_DISP_HF_AXI_CLK>,
62                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
63                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
64        clock-names = "iface", "bus", "core", "vsync";
65
66        assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
67        assigned-clock-rates = <19200000>;
68
69        operating-points-v2 = <&mdp_opp_table>;
70        power-domains = <&rpmhpd SM8150_MMCX>;
71
72        interrupt-parent = <&mdss>;
73        interrupts = <0>;
74
75        ports {
76            #address-cells = <1>;
77            #size-cells = <0>;
78
79            port@0 {
80                reg = <0>;
81                endpoint {
82                    remote-endpoint = <&dsi0_in>;
83                };
84            };
85
86            port@1 {
87                reg = <1>;
88                endpoint {
89                    remote-endpoint = <&dsi1_in>;
90                };
91            };
92        };
93    };
94...
95