1440b075bSKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 22abfd6a2SDmitry Baryshkov%YAML 1.2 32abfd6a2SDmitry Baryshkov--- 42abfd6a2SDmitry Baryshkov$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 52abfd6a2SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml# 62abfd6a2SDmitry Baryshkov 7477bdf8bSKrzysztof Kozlowskititle: Qualcomm Display DPU on SDM845 82abfd6a2SDmitry Baryshkov 92abfd6a2SDmitry Baryshkovmaintainers: 102abfd6a2SDmitry Baryshkov - Krishna Manikandan <quic_mkrishn@quicinc.com> 112abfd6a2SDmitry Baryshkov 122abfd6a2SDmitry Baryshkov$ref: /schemas/display/msm/dpu-common.yaml# 132abfd6a2SDmitry Baryshkov 142abfd6a2SDmitry Baryshkovproperties: 152abfd6a2SDmitry Baryshkov compatible: 16*0e1af3ecSRichard Acayan enum: 17*0e1af3ecSRichard Acayan - qcom,sdm670-dpu 18*0e1af3ecSRichard Acayan - qcom,sdm845-dpu 192abfd6a2SDmitry Baryshkov 202abfd6a2SDmitry Baryshkov reg: 212abfd6a2SDmitry Baryshkov items: 222abfd6a2SDmitry Baryshkov - description: Address offset and size for mdp register set 232abfd6a2SDmitry Baryshkov - description: Address offset and size for vbif register set 242abfd6a2SDmitry Baryshkov 252abfd6a2SDmitry Baryshkov reg-names: 262abfd6a2SDmitry Baryshkov items: 272abfd6a2SDmitry Baryshkov - const: mdp 282abfd6a2SDmitry Baryshkov - const: vbif 292abfd6a2SDmitry Baryshkov 302abfd6a2SDmitry Baryshkov clocks: 312abfd6a2SDmitry Baryshkov items: 322abfd6a2SDmitry Baryshkov - description: Display GCC bus clock 332abfd6a2SDmitry Baryshkov - description: Display ahb clock 342abfd6a2SDmitry Baryshkov - description: Display axi clock 352abfd6a2SDmitry Baryshkov - description: Display core clock 362abfd6a2SDmitry Baryshkov - description: Display vsync clock 372abfd6a2SDmitry Baryshkov 382abfd6a2SDmitry Baryshkov clock-names: 392abfd6a2SDmitry Baryshkov items: 402abfd6a2SDmitry Baryshkov - const: gcc-bus 412abfd6a2SDmitry Baryshkov - const: iface 422abfd6a2SDmitry Baryshkov - const: bus 432abfd6a2SDmitry Baryshkov - const: core 442abfd6a2SDmitry Baryshkov - const: vsync 452abfd6a2SDmitry Baryshkov 4673162e5dSDmitry Baryshkovrequired: 4773162e5dSDmitry Baryshkov - compatible 4873162e5dSDmitry Baryshkov - reg 4973162e5dSDmitry Baryshkov - reg-names 5073162e5dSDmitry Baryshkov - clocks 5173162e5dSDmitry Baryshkov - clock-names 5273162e5dSDmitry Baryshkov 532abfd6a2SDmitry BaryshkovunevaluatedProperties: false 542abfd6a2SDmitry Baryshkov 552abfd6a2SDmitry Baryshkovexamples: 562abfd6a2SDmitry Baryshkov - | 572abfd6a2SDmitry Baryshkov #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 582abfd6a2SDmitry Baryshkov #include <dt-bindings/clock/qcom,gcc-sdm845.h> 592abfd6a2SDmitry Baryshkov #include <dt-bindings/power/qcom-rpmpd.h> 602abfd6a2SDmitry Baryshkov 612abfd6a2SDmitry Baryshkov display-controller@ae01000 { 622abfd6a2SDmitry Baryshkov compatible = "qcom,sdm845-dpu"; 632abfd6a2SDmitry Baryshkov reg = <0x0ae01000 0x8f000>, 642abfd6a2SDmitry Baryshkov <0x0aeb0000 0x2008>; 652abfd6a2SDmitry Baryshkov reg-names = "mdp", "vbif"; 662abfd6a2SDmitry Baryshkov 672abfd6a2SDmitry Baryshkov clocks = <&gcc GCC_DISP_AXI_CLK>, 682abfd6a2SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 692abfd6a2SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AXI_CLK>, 702abfd6a2SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 712abfd6a2SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 722abfd6a2SDmitry Baryshkov clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; 732abfd6a2SDmitry Baryshkov 742abfd6a2SDmitry Baryshkov interrupt-parent = <&mdss>; 752abfd6a2SDmitry Baryshkov interrupts = <0>; 762abfd6a2SDmitry Baryshkov power-domains = <&rpmhpd SDM845_CX>; 772abfd6a2SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 782abfd6a2SDmitry Baryshkov 792abfd6a2SDmitry Baryshkov ports { 802abfd6a2SDmitry Baryshkov #address-cells = <1>; 812abfd6a2SDmitry Baryshkov #size-cells = <0>; 822abfd6a2SDmitry Baryshkov 832abfd6a2SDmitry Baryshkov port@0 { 842abfd6a2SDmitry Baryshkov reg = <0>; 852abfd6a2SDmitry Baryshkov endpoint { 862abfd6a2SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 872abfd6a2SDmitry Baryshkov }; 882abfd6a2SDmitry Baryshkov }; 892abfd6a2SDmitry Baryshkov 902abfd6a2SDmitry Baryshkov port@1 { 912abfd6a2SDmitry Baryshkov reg = <1>; 922abfd6a2SDmitry Baryshkov endpoint { 932abfd6a2SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 942abfd6a2SDmitry Baryshkov }; 952abfd6a2SDmitry Baryshkov }; 962abfd6a2SDmitry Baryshkov }; 972abfd6a2SDmitry Baryshkov }; 982abfd6a2SDmitry Baryshkov... 99