xref: /linux/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml (revision 4f38da1f027ea2c9f01bb71daa7a299c191b6940)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/qcom,sc8180x-dpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SC8180X Display DPU

maintainers:
  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

$ref: /schemas/display/msm/dpu-common.yaml#

properties:
  compatible:
    const: qcom,sc8180x-dpu

  reg:
    items:
      - description: Address offset and size for mdp register set
      - description: Address offset and size for vbif register set

  reg-names:
    items:
      - const: mdp
      - const: vbif

  clocks:
    items:
      - description: Display AHB clock
      - description: Display HF AXI clock
      - description: Display core clock
      - description: Display vsync clock
      - description: Display rotator clock
      - description: Display LUT clock

  clock-names:
    items:
      - const: iface
      - const: bus
      - const: core
      - const: vsync
      - const: rot
      - const: lut

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
    #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interconnect/qcom,sc8180x.h>
    #include <dt-bindings/power/qcom-rpmpd.h>

    display-controller@ae01000 {
        compatible = "qcom,sc8180x-dpu";
        reg = <0x0ae01000 0x8f000>,
              <0x0aeb0000 0x2008>;
        reg-names = "mdp", "vbif";

        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
                 <&gcc GCC_DISP_HF_AXI_CLK>,
                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
                 <&dispcc DISP_CC_MDSS_ROT_CLK>,
                 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>;
        clock-names = "iface",
                      "bus",
                      "core",
                      "vsync",
                      "rot",
                      "lut";

        assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
        assigned-clock-rates = <19200000>;

        operating-points-v2 = <&mdp_opp_table>;
        power-domains = <&rpmhpd SC8180X_MMCX>;

        interrupt-parent = <&mdss>;
        interrupts = <0>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                endpoint {
                    remote-endpoint = <&dsi0_in>;
                };
            };

            port@1 {
                reg = <1>;
                endpoint {
                    remote-endpoint = <&dsi1_in>;
                };
            };
        };
    };
...