xref: /linux/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml (revision 07f0148aafe8c95a3a76cd59e9e75b4d78d1d31d) 
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DPU dt properties for SC7280
8
9maintainers:
10  - Krishna Manikandan <quic_mkrishn@quicinc.com>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    const: qcom,sc7280-dpu
17
18  reg:
19    items:
20      - description: Address offset and size for mdp register set
21      - description: Address offset and size for vbif register set
22
23  reg-names:
24    items:
25      - const: mdp
26      - const: vbif
27
28  clocks:
29    items:
30      - description: Display hf axi clock
31      - description: Display sf axi clock
32      - description: Display ahb clock
33      - description: Display lut clock
34      - description: Display core clock
35      - description: Display vsync clock
36
37  clock-names:
38    items:
39      - const: bus
40      - const: nrt_bus
41      - const: iface
42      - const: lut
43      - const: core
44      - const: vsync
45
46unevaluatedProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
51    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
52    #include <dt-bindings/power/qcom-rpmpd.h>
53
54    display-controller@ae01000 {
55        compatible = "qcom,sc7280-dpu";
56        reg = <0x0ae01000 0x8f000>,
57              <0x0aeb0000 0x2008>;
58
59        reg-names = "mdp", "vbif";
60
61        clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
62                 <&gcc GCC_DISP_SF_AXI_CLK>,
63                 <&dispcc DISP_CC_MDSS_AHB_CLK>,
64                 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
65                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
66                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
67        clock-names = "bus",
68                      "nrt_bus",
69                      "iface",
70                      "lut",
71                      "core",
72                      "vsync";
73
74        interrupt-parent = <&mdss>;
75        interrupts = <0>;
76        power-domains = <&rpmhpd SC7280_CX>;
77        operating-points-v2 = <&mdp_opp_table>;
78
79        ports {
80            #address-cells = <1>;
81            #size-cells = <0>;
82
83            port@0 {
84                reg = <0>;
85                endpoint {
86                    remote-endpoint = <&dsi0_in>;
87                };
88            };
89
90            port@1 {
91                reg = <1>;
92                endpoint {
93                    remote-endpoint = <&edp_in>;
94                };
95            };
96        };
97    };
98...
99