xref: /linux/Documentation/devicetree/bindings/display/msm/mdss-common.yaml (revision 1c07425e902cd3137961c3d45b4271bf8a9b8eb9)
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display MDSS common properties
8
9maintainers:
10  - Krishna Manikandan <quic_mkrishn@quicinc.com>
11  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12  - Rob Clark <robdclark@gmail.com>
13
14description:
15  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
16  sub-blocks like DPU display controller, DSI and DP interfaces etc.
17
18properties:
19  reg:
20    maxItems: 1
21
22  reg-names:
23    const: mdss
24
25  power-domains:
26    maxItems: 1
27
28  clocks:
29    minItems: 2
30    maxItems: 4
31
32  clock-names:
33    minItems: 2
34    maxItems: 4
35
36  interrupts:
37    maxItems: 1
38
39  interrupt-controller: true
40
41  "#address-cells": true
42
43  "#size-cells": true
44
45  "#interrupt-cells":
46    const: 1
47
48  iommus:
49    minItems: 1
50    items:
51      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
52      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
53
54  ranges: true
55
56  interconnects:
57    minItems: 1
58    items:
59      - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
60      - description: Interconnect path from mdp1 port to the data bus
61
62  interconnect-names:
63    minItems: 1
64    items:
65      - const: mdp0-mem
66      - const: mdp1-mem
67
68  resets:
69    items:
70      - description: MDSS_CORE reset
71
72required:
73  - compatible
74  - reg
75  - reg-names
76  - power-domains
77  - clocks
78  - interrupts
79  - interrupt-controller
80  - iommus
81  - ranges
82
83additionalProperties: true
84