xref: /linux/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml (revision 6beeaf48db6c548fcfc2ad32739d33af2fef3a5b) 
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DSI 14nm PHY
8
9maintainers:
10  - Krishna Manikandan <mkrishn@codeaurora.org>
11
12allOf:
13  - $ref: dsi-phy-common.yaml#
14
15properties:
16  compatible:
17    enum:
18      - qcom,dsi-phy-14nm
19      - qcom,dsi-phy-14nm-660
20
21  reg:
22    items:
23      - description: dsi phy register set
24      - description: dsi phy lane register set
25      - description: dsi pll register set
26
27  reg-names:
28    items:
29      - const: dsi_phy
30      - const: dsi_phy_lane
31      - const: dsi_pll
32
33  vcca-supply:
34    description: Phandle to vcca regulator device node.
35
36required:
37  - compatible
38  - reg
39  - reg-names
40  - vcca-supply
41
42unevaluatedProperties: false
43
44examples:
45  - |
46     #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
47     #include <dt-bindings/clock/qcom,rpmh.h>
48
49     dsi-phy@ae94400 {
50         compatible = "qcom,dsi-phy-14nm";
51         reg = <0x0ae94400 0x200>,
52               <0x0ae94600 0x280>,
53               <0x0ae94a00 0x1e0>;
54         reg-names = "dsi_phy",
55                     "dsi_phy_lane",
56                     "dsi_pll";
57
58         #clock-cells = <1>;
59         #phy-cells = <0>;
60
61         vcca-supply = <&vcca_reg>;
62         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
63                  <&rpmhcc RPMH_CXO_CLK>;
64         clock-names = "iface", "ref";
65     };
66...
67