xref: /linux/Documentation/devicetree/bindings/display/msm/dp-controller.yaml (revision 5ea5880764cbb164afb17a62e76ca75dc371409d)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MSM Display Port Controller
8
9maintainers:
10  - Kuogee Hsieh <quic_khsieh@quicinc.com>
11  - Abhinav Kumar <quic_abhinavk@quicinc.com>
12
13description: |
14  Device tree bindings for DisplayPort host controller for MSM targets
15  that are compatible with VESA DisplayPort interface specification.
16
17properties:
18  compatible:
19    oneOf:
20      - enum:
21          - qcom,glymur-dp
22          - qcom,sa8775p-dp
23          - qcom,sc7180-dp
24          - qcom,sc7280-dp
25          - qcom,sc7280-edp
26          - qcom,sc8180x-dp
27          - qcom,sc8180x-edp
28          - qcom,sc8280xp-dp
29          - qcom,sc8280xp-edp
30          - qcom,sdm845-dp
31          - qcom,sm8350-dp
32          - qcom,sm8650-dp
33          - qcom,x1e80100-dp
34
35      - items:
36          - enum:
37              - qcom,qcs8300-dp
38          - const: qcom,sa8775p-dp
39
40      - items:
41          - enum:
42              - qcom,sm6350-dp
43          - const: qcom,sc7180-dp
44
45      # deprecated entry for compatibility with old DT
46      - items:
47          - enum:
48              - qcom,sm6350-dp
49          - const: qcom,sm8350-dp
50        deprecated: true
51
52      - items:
53          - enum:
54              - qcom,sar2130p-dp
55              - qcom,sm7150-dp
56              - qcom,sm8150-dp
57              - qcom,sm8250-dp
58              - qcom,sm8450-dp
59              - qcom,sm8550-dp
60          - const: qcom,sm8350-dp
61
62      - items:
63          - enum:
64              - qcom,sm6150-dp
65          - const: qcom,sm8150-dp
66          - const: qcom,sm8350-dp
67
68      - items:
69          - enum:
70              - qcom,eliza-dp
71              - qcom,sm8750-dp
72          - const: qcom,sm8650-dp
73
74  reg:
75    minItems: 4
76    items:
77      - description: ahb register block
78      - description: aux register block
79      - description: link register block
80      - description: p0 register block
81      - description: p1 register block
82      - description: p2 register block
83      - description: p3 register block
84      - description: mst2link register block
85      - description: mst3link register block
86
87  interrupts:
88    maxItems: 1
89
90  clocks:
91    minItems: 5
92    items:
93      - description: AHB clock to enable register access
94      - description: Display Port AUX clock
95      - description: Display Port Link clock
96      - description: Link interface clock between DP and PHY
97      - description: Display Port stream 0 Pixel clock
98      - description: Display Port stream 1 Pixel clock
99      - description: Display Port stream 2 Pixel clock
100      - description: Display Port stream 3 Pixel clock
101
102  clock-names:
103    minItems: 5
104    items:
105      - const: core_iface
106      - const: core_aux
107      - const: ctrl_link
108      - const: ctrl_link_iface
109      - const: stream_pixel
110      - const: stream_1_pixel
111      - const: stream_2_pixel
112      - const: stream_3_pixel
113
114  phys:
115    maxItems: 1
116
117  phy-names:
118    items:
119      - const: dp
120
121  operating-points-v2: true
122
123  opp-table:
124    type: object
125
126  power-domains:
127    maxItems: 1
128
129  aux-bus:
130    $ref: /schemas/display/dp-aux-bus.yaml#
131
132  data-lanes:
133    $ref: /schemas/types.yaml#/definitions/uint32-array
134    deprecated: true
135    minItems: 1
136    maxItems: 4
137    items:
138      maximum: 3
139
140  "#sound-dai-cells":
141    const: 0
142
143  vdda-0p9-supply:
144    deprecated: true
145  vdda-1p2-supply:
146    deprecated: true
147
148  ports:
149    $ref: /schemas/graph.yaml#/properties/ports
150    properties:
151      port@0:
152        $ref: /schemas/graph.yaml#/properties/port
153        description: Input endpoint of the controller
154
155      port@1:
156        $ref: /schemas/graph.yaml#/$defs/port-base
157        unevaluatedProperties: false
158        description: Output endpoint of the controller
159        properties:
160          endpoint:
161            $ref: /schemas/media/video-interfaces.yaml#
162            unevaluatedProperties: false
163            properties:
164              data-lanes:
165                minItems: 1
166                maxItems: 4
167                items:
168                  enum: [ 0, 1, 2, 3 ]
169
170              link-frequencies:
171                minItems: 1
172                maxItems: 4
173                items:
174                  enum: [ 1620000000, 2700000000, 5400000000, 8100000000 ]
175
176    required:
177      - port@0
178      - port@1
179
180required:
181  - compatible
182  - reg
183  - interrupts
184  - clocks
185  - clock-names
186  - phys
187  - phy-names
188  - power-domains
189  - ports
190
191allOf:
192  # AUX BUS does not exist on DP controllers
193  # Audio output also is present only on DP output
194  - if:
195      properties:
196        compatible:
197          contains:
198            enum:
199              - qcom,sc7280-edp
200              - qcom,sc8180x-edp
201              - qcom,sc8280xp-edp
202    then:
203      properties:
204        "#sound-dai-cells": false
205    else:
206      if:
207        properties:
208          compatible:
209            contains:
210              enum:
211                - qcom,glymur-dp
212                - qcom,sa8775p-dp
213                - qcom,x1e80100-dp
214      then:
215        $ref: /schemas/sound/dai-common.yaml#
216        oneOf:
217          - required:
218              - aux-bus
219          - required:
220              - "#sound-dai-cells"
221      else:
222        properties:
223          aux-bus: false
224        required:
225          - "#sound-dai-cells"
226
227  - if:
228      properties:
229        compatible:
230          contains:
231            enum:
232              # these platforms support SST only
233              - qcom,sc7180-dp
234              - qcom,sc7280-dp
235              - qcom,sc7280-edp
236              - qcom,sc8180x-edp
237              - qcom,sc8280xp-edp
238    then:
239      properties:
240        reg:
241          minItems: 5
242          maxItems: 5
243        clocks:
244          minItems: 5
245          maxItems: 5
246        clocks-names:
247          minItems: 5
248          maxItems: 5
249
250  - if:
251      properties:
252        compatible:
253          contains:
254            enum:
255              # these platforms support 2 streams MST on some interfaces,
256              # others are SST only
257              - qcom,sc8280xp-dp
258              - qcom,x1e80100-dp
259    then:
260      properties:
261        reg:
262          minItems: 5
263          maxItems: 5
264        clocks:
265          minItems: 5
266          maxItems: 6
267        clocks-names:
268          minItems: 5
269          maxItems: 6
270
271  - if:
272      properties:
273        compatible:
274          contains:
275            # 2 streams MST
276            enum:
277              - qcom,sc8180x-dp
278              - qcom,sdm845-dp
279              - qcom,sm8350-dp
280              - qcom,sm8650-dp
281    then:
282      properties:
283        reg:
284          minItems: 5
285          maxItems: 5
286        clocks:
287          minItems: 6
288          maxItems: 6
289        clocks-names:
290          minItems: 6
291          maxItems: 6
292
293  - if:
294      properties:
295        compatible:
296          contains:
297            enum:
298              # these platforms support 4 stream MST on first DP,
299              # 2 streams MST on the second one.
300              - qcom,sa8775p-dp
301    then:
302      properties:
303        reg:
304          minItems: 9
305          maxItems: 9
306        clocks:
307          minItems: 6
308          maxItems: 8
309        clocks-names:
310          minItems: 6
311          maxItems: 8
312
313  - if:
314      properties:
315        compatible:
316          contains:
317            enum:
318              # these platforms support 2 streams MST on some interfaces,
319              # others are SST only, but all controllers have 4 ports
320              - qcom,glymur-dp
321    then:
322      properties:
323        reg:
324          minItems: 9
325          maxItems: 9
326        clocks:
327          minItems: 5
328          maxItems: 6
329        clocks-names:
330          minItems: 5
331          maxItems: 6
332
333unevaluatedProperties: false
334
335examples:
336  - |
337    #include <dt-bindings/interrupt-controller/arm-gic.h>
338    #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
339    #include <dt-bindings/power/qcom-rpmpd.h>
340
341    displayport-controller@ae90000 {
342        compatible = "qcom,sc7180-dp";
343        reg = <0xae90000 0x200>,
344              <0xae90200 0x200>,
345              <0xae90400 0xc00>,
346              <0xae91000 0x400>,
347              <0xae91400 0x400>;
348        interrupt-parent = <&mdss>;
349        interrupts = <12>;
350        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
351                 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
352                 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
353                 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
354                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
355        clock-names = "core_iface", "core_aux",
356                      "ctrl_link",
357                      "ctrl_link_iface", "stream_pixel";
358
359        assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
360                          <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
361
362        assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
363
364        phys = <&dp_phy>;
365        phy-names = "dp";
366
367        #sound-dai-cells = <0>;
368
369        power-domains = <&rpmhpd SC7180_CX>;
370
371        ports {
372            #address-cells = <1>;
373            #size-cells = <0>;
374
375            port@0 {
376                reg = <0>;
377                endpoint {
378                    remote-endpoint = <&dpu_intf0_out>;
379                };
380            };
381
382            port@1 {
383                reg = <1>;
384                endpoint {
385                    remote-endpoint = <&typec>;
386                    data-lanes = <0 1>;
387                    link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
388                };
389            };
390        };
391    };
392...
393