xref: /linux/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml (revision 9e56ff53b4115875667760445b028357848b4748) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek DPI and DP_INTF Controller
8
9maintainers:
10  - CK Hu <ck.hu@mediatek.com>
11  - Jitao shi <jitao.shi@mediatek.com>
12
13description: |
14  The MediaTek DPI and DP_INTF function blocks are a sink of the display
15  subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
16  parallel output bus.
17
18properties:
19  compatible:
20    oneOf:
21      - enum:
22          - mediatek,mt2701-dpi
23          - mediatek,mt7623-dpi
24          - mediatek,mt8173-dpi
25          - mediatek,mt8183-dpi
26          - mediatek,mt8186-dpi
27          - mediatek,mt8188-dp-intf
28          - mediatek,mt8192-dpi
29          - mediatek,mt8195-dp-intf
30      - items:
31          - enum:
32              - mediatek,mt6795-dpi
33          - const: mediatek,mt8183-dpi
34
35  reg:
36    maxItems: 1
37
38  interrupts:
39    maxItems: 1
40
41  clocks:
42    items:
43      - description: Pixel Clock
44      - description: Engine Clock
45      - description: DPI PLL
46
47  clock-names:
48    items:
49      - const: pixel
50      - const: engine
51      - const: pll
52
53  pinctrl-0: true
54  pinctrl-1: true
55
56  pinctrl-names:
57    items:
58      - const: default
59      - const: sleep
60
61  port:
62    $ref: /schemas/graph.yaml#/properties/port
63    description:
64      Output port node. This port should be connected to the input port of an
65      attached HDMI, LVDS or DisplayPort encoder chip.
66
67required:
68  - compatible
69  - reg
70  - interrupts
71  - clocks
72  - clock-names
73  - port
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80    #include <dt-bindings/clock/mt8173-clk.h>
81
82    dpi0: dpi@1401d000 {
83        compatible = "mediatek,mt8173-dpi";
84        reg = <0x1401d000 0x1000>;
85        interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
86        clocks = <&mmsys CLK_MM_DPI_PIXEL>,
87             <&mmsys CLK_MM_DPI_ENGINE>,
88             <&apmixedsys CLK_APMIXED_TVDPLL>;
89        clock-names = "pixel", "engine", "pll";
90        pinctrl-names = "default", "sleep";
91        pinctrl-0 = <&dpi_pin_func>;
92        pinctrl-1 = <&dpi_pin_idle>;
93
94        port {
95            dpi0_out: endpoint {
96                remote-endpoint = <&hdmi0_in>;
97            };
98        };
99    };
100
101...
102